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!fixup fix formatting, build failure
1 parent 91eed02 commit 3b004dd

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4 files changed

+12
-10
lines changed

4 files changed

+12
-10
lines changed

llvm/lib/Analysis/VectorUtils.cpp

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1387,10 +1387,9 @@ void InterleavedAccessInfo::collectConstStrideAccesses(
13871387
// wrap around the address space we would do a memory access at nullptr
13881388
// even without the transformation. The wrapping checks are therefore
13891389
// deferred until after we've formed the interleaved groups.
1390-
int64_t Stride =
1391-
getPtrStride(PSE, ElementTy, Ptr, TheLoop, *DT, Strides,
1392-
/*Assume=*/true, /*ShouldCheckWrap=*/false)
1393-
.value_or(0);
1390+
int64_t Stride = getPtrStride(PSE, ElementTy, Ptr, TheLoop, *DT, Strides,
1391+
/*Assume=*/true, /*ShouldCheckWrap=*/false)
1392+
.value_or(0);
13941393

13951394
const SCEV *Scev = replaceSymbolicStrideSCEV(PSE, Strides, Ptr);
13961395
AccessStrideInfo[&I] = StrideDescriptor(Stride, Scev, Size,

llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2499,8 +2499,8 @@ static bool canTailPredicateLoop(Loop *L, LoopInfo *LI, ScalarEvolution &SE,
24992499
if (isa<StoreInst>(I) || isa<LoadInst>(I)) {
25002500
Value *Ptr = getLoadStorePointerOperand(&I);
25012501
Type *AccessTy = getLoadStoreType(&I);
2502-
int64_t NextStride = getPtrStride(PSE, AccessTy, Ptr, L,
2503-
DT).value_or(0);
2502+
int64_t NextStride =
2503+
getPtrStride(PSE, AccessTy, Ptr, L, DT).value_or(0);
25042504
if (NextStride == 1) {
25052505
// TODO: for now only allow consecutive strides of 1. We could support
25062506
// other strides as long as it is uniform, but let's keep it simple

llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -102,8 +102,10 @@ struct StoreToLoadForwardingCandidate {
102102
DL.getTypeSizeInBits(getLoadStoreType(Store)) &&
103103
"Should be a known dependence");
104104

105-
int64_t StrideLoad = getPtrStride(PSE, LoadType, LoadPtr, L, DT).value_or(0);
106-
int64_t StrideStore = getPtrStride(PSE, LoadType, StorePtr, L, DT).value_or(0);
105+
int64_t StrideLoad =
106+
getPtrStride(PSE, LoadType, LoadPtr, L, DT).value_or(0);
107+
int64_t StrideStore =
108+
getPtrStride(PSE, LoadType, StorePtr, L, DT).value_or(0);
107109
if (!StrideLoad || !StrideStore || StrideLoad != StrideStore)
108110
return false;
109111

llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -462,8 +462,9 @@ int LoopVectorizationLegality::isConsecutivePtr(Type *AccessTy,
462462

463463
bool CanAddPredicate = !llvm::shouldOptimizeForSize(
464464
TheLoop->getHeader(), PSI, BFI, PGSOQueryType::IRPass);
465-
int Stride = getPtrStride(PSE, AccessTy, Ptr, TheLoop, Strides,
466-
CanAddPredicate, false).value_or(0);
465+
int Stride = getPtrStride(PSE, AccessTy, Ptr, TheLoop, *DT, Strides,
466+
CanAddPredicate, false)
467+
.value_or(0);
467468
if (Stride == 1 || Stride == -1)
468469
return Stride;
469470
return 0;

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