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ElvisWang123ElvisWang123
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!fixup, remove custom types.
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‎llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll‎

Lines changed: 24 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -2,9 +2,6 @@
22
; RUN: opt < %s -passes=loop-vectorize -mtriple riscv64 -mattr=+rva23u64 -S | FileCheck %s -check-prefixes=CHECK,RVA23
33
; RUN: opt < %s -passes=loop-vectorize -mtriple riscv64 -mattr=+rva23u64,+zvl1024b -S | FileCheck %s -check-prefixes=CHECK,RVA23ZVL1024B
44

5-
%t0 = type { ptr, %t1, ptr }
6-
%t1 = type { i32, i32, i32, i32, i32, ptr, ptr, i32, i32, i32, i32, i32, ptr, ptr, i32, i32, i32, i32, i32, i32 }
7-
85
define void @predicated_uniform_load(ptr %src, i32 %n, ptr %dst, i1 %cond) {
96
; CHECK-LABEL: @predicated_uniform_load(
107
; CHECK-NEXT: entry:
@@ -188,24 +185,16 @@ exit:
188185
ret void
189186
}
190187

191-
define void @uniform_load_and_addr_also_uniform_load(ptr %0, i32 %.pre, ptr %1, ptr %C) {
188+
define void @uniform_load_and_addr_also_uniform_load(ptr noalias %0, i32 %.pre, ptr noalias %1, ptr noalias %C) {
192189
; CHECK-LABEL: @uniform_load_and_addr_also_uniform_load(
193190
; CHECK-NEXT: entry:
194191
; CHECK-NEXT: [[CMP91:%.*]] = icmp sgt i32 [[DOTPRE:%.*]], 0
195192
; CHECK-NEXT: br i1 [[CMP91]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
196193
; CHECK: loop.preheader:
197194
; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[DOTPRE]] to i64
198195
; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
199-
; CHECK: vector.memcheck:
200-
; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i64 [[WIDE_TRIP_COUNT]], 120
201-
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[TMP1:%.*]], i64 [[TMP2]]
202-
; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[TMP0:%.*]], i64 8
203-
; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[TMP1]], [[SCEVGEP1]]
204-
; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[TMP0]], [[SCEVGEP]]
205-
; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
206-
; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
207196
; CHECK: vector.ph:
208-
; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x ptr> poison, ptr [[TMP0]], i64 0
197+
; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x ptr> poison, ptr [[TMP0:%.*]], i64 0
209198
; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x ptr> [[BROADCAST_SPLATINSERT]], <vscale x 2 x ptr> poison, <vscale x 2 x i32> zeroinitializer
210199
; CHECK-NEXT: [[BROADCAST_SPLATINSERT2:%.*]] = insertelement <vscale x 2 x ptr> poison, ptr [[C:%.*]], i64 0
211200
; CHECK-NEXT: [[BROADCAST_SPLAT3:%.*]] = shufflevector <vscale x 2 x ptr> [[BROADCAST_SPLATINSERT2]], <vscale x 2 x ptr> poison, <vscale x 2 x i32> zeroinitializer
@@ -214,53 +203,52 @@ define void @uniform_load_and_addr_also_uniform_load(ptr %0, i32 %.pre, ptr %1,
214203
; CHECK-NEXT: [[INDUCTION:%.*]] = add <vscale x 2 x i64> zeroinitializer, [[TMP4]]
215204
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
216205
; CHECK: vector.body:
217-
; CHECK-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[INDUCTION]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
218-
; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ [[WIDE_TRIP_COUNT]], [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
206+
; CHECK-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[INDUCTION]], [[VECTOR_MEMCHECK]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
207+
; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ [[WIDE_TRIP_COUNT]], [[VECTOR_MEMCHECK]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
219208
; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)
220209
; CHECK-NEXT: [[TMP6:%.*]] = zext i32 [[TMP5]] to i64
221210
; CHECK-NEXT: [[BROADCAST_SPLATINSERT4:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP6]], i64 0
222211
; CHECK-NEXT: [[BROADCAST_SPLAT5:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT4]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
223-
; CHECK-NEXT: [[TMP7:%.*]] = getelementptr [[T0:%.*]], ptr [[TMP1]], <vscale x 2 x i64> [[VEC_IND]]
224-
; CHECK-NEXT: [[TMP8:%.*]] = load ptr, ptr [[TMP0]], align 8, !tbaa [[TBAA12:![0-9]+]], !alias.scope [[META16:![0-9]+]]
212+
; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i32, ptr [[TMP1:%.*]], <vscale x 2 x i64> [[VEC_IND]]
213+
; CHECK-NEXT: [[TMP8:%.*]] = load ptr, ptr [[TMP0]], align 8, !tbaa [[TBAA12:![0-9]+]]
225214
; CHECK-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <vscale x 2 x ptr> poison, ptr [[TMP8]], i64 0
226215
; CHECK-NEXT: [[BROADCAST_SPLAT7:%.*]] = shufflevector <vscale x 2 x ptr> [[BROADCAST_SPLATINSERT6]], <vscale x 2 x ptr> poison, <vscale x 2 x i32> zeroinitializer
227-
; CHECK-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 2 x i32> @llvm.vp.gather.nxv2i32.nxv2p0(<vscale x 2 x ptr> align 4 [[BROADCAST_SPLAT7]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP5]]), !tbaa [[TBAA19:![0-9]+]]
216+
; CHECK-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 2 x i32> @llvm.vp.gather.nxv2i32.nxv2p0(<vscale x 2 x ptr> align 4 [[BROADCAST_SPLAT7]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP5]]), !tbaa [[TBAA16:![0-9]+]]
228217
; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <vscale x 2 x i32> [[WIDE_MASKED_GATHER]], zeroinitializer
229218
; CHECK-NEXT: [[TMP10:%.*]] = select <vscale x 2 x i1> [[TMP9]], <vscale x 2 x ptr> [[BROADCAST_SPLAT]], <vscale x 2 x ptr> [[BROADCAST_SPLAT3]]
230219
; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, <vscale x 2 x ptr> [[TMP7]], i64 112
231-
; CHECK-NEXT: call void @llvm.vp.scatter.nxv2p0.nxv2p0(<vscale x 2 x ptr> [[TMP10]], <vscale x 2 x ptr> align 8 [[TMP11]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP5]]), !tbaa [[TBAA25:![0-9]+]], !alias.scope [[META28:![0-9]+]], !noalias [[META16]]
232-
; CHECK-NEXT: [[WIDE_MASKED_GATHER8:%.*]] = call <vscale x 2 x ptr> @llvm.vp.gather.nxv2p0.nxv2p0(<vscale x 2 x ptr> align 8 [[TMP7]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP5]]), !tbaa [[TBAA30:![0-9]+]], !alias.scope [[META28]], !noalias [[META16]]
220+
; CHECK-NEXT: call void @llvm.vp.scatter.nxv2p0.nxv2p0(<vscale x 2 x ptr> [[TMP10]], <vscale x 2 x ptr> align 8 [[TMP11]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP5]]), !tbaa [[TBAA22:![0-9]+]]
221+
; CHECK-NEXT: [[WIDE_MASKED_GATHER8:%.*]] = call <vscale x 2 x ptr> @llvm.vp.gather.nxv2p0.nxv2p0(<vscale x 2 x ptr> align 8 [[TMP7]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP5]]), !tbaa [[TBAA25:![0-9]+]]
233222
; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, <vscale x 2 x ptr> [[WIDE_MASKED_GATHER8]], i64 4
234-
; CHECK-NEXT: call void @llvm.vp.scatter.nxv2i32.nxv2p0(<vscale x 2 x i32> zeroinitializer, <vscale x 2 x ptr> align 4 [[TMP12]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP5]]), !tbaa [[TBAA31:![0-9]+]]
235-
; CHECK-NEXT: call void @llvm.vp.scatter.nxv2i32.nxv2p0(<vscale x 2 x i32> zeroinitializer, <vscale x 2 x ptr> align 8 [[WIDE_MASKED_GATHER8]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP5]]), !tbaa [[TBAA33:![0-9]+]]
236-
; CHECK-NEXT: call void @llvm.vp.scatter.nxv2i8.nxv2p0(<vscale x 2 x i8> zeroinitializer, <vscale x 2 x ptr> align 8 [[WIDE_MASKED_GATHER8]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP5]]), !tbaa [[TBAA34:![0-9]+]]
223+
; CHECK-NEXT: call void @llvm.vp.scatter.nxv2i32.nxv2p0(<vscale x 2 x i32> zeroinitializer, <vscale x 2 x ptr> align 4 [[TMP12]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP5]]), !tbaa [[TBAA26:![0-9]+]]
224+
; CHECK-NEXT: call void @llvm.vp.scatter.nxv2i32.nxv2p0(<vscale x 2 x i32> zeroinitializer, <vscale x 2 x ptr> align 8 [[WIDE_MASKED_GATHER8]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP5]]), !tbaa [[TBAA28:![0-9]+]]
225+
; CHECK-NEXT: call void @llvm.vp.scatter.nxv2i8.nxv2p0(<vscale x 2 x i8> zeroinitializer, <vscale x 2 x ptr> align 8 [[WIDE_MASKED_GATHER8]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP5]]), !tbaa [[TBAA29:![0-9]+]]
237226
; CHECK-NEXT: [[TMP13:%.*]] = zext i32 [[TMP5]] to i64
238227
; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP13]]
239228
; CHECK-NEXT: [[VEC_IND_NEXT]] = add <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT5]]
240229
; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
241-
; CHECK-NEXT: br i1 [[TMP14]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP35:![0-9]+]]
230+
; CHECK-NEXT: br i1 [[TMP14]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP30:![0-9]+]]
242231
; CHECK: middle.block:
243232
; CHECK-NEXT: br label [[FOR_END_LOOPEXIT:%.*]]
244233
; CHECK: scalar.ph:
245-
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, [[FOR_BODY_PREHEADER]] ], [ 0, [[VECTOR_MEMCHECK]] ]
246234
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
247235
; CHECK: loop:
248-
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
249-
; CHECK-NEXT: [[ARRAYIDX11:%.*]] = getelementptr [[T0]], ptr [[TMP1]], i64 [[INDVARS_IV]]
236+
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
237+
; CHECK-NEXT: [[ARRAYIDX11:%.*]] = getelementptr i32, ptr [[TMP1]], i64 [[INDVARS_IV]]
250238
; CHECK-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP0]], align 8, !tbaa [[TBAA12]]
251-
; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4, !tbaa [[TBAA19]]
239+
; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4, !tbaa [[TBAA16]]
252240
; CHECK-NEXT: [[CMP12:%.*]] = icmp eq i32 [[TMP16]], 0
253241
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[CMP12]], ptr [[TMP0]], ptr [[C]]
254242
; CHECK-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[ARRAYIDX11]], i64 112
255-
; CHECK-NEXT: store ptr [[SPEC_SELECT]], ptr [[TMP17]], align 8, !tbaa [[TBAA25]]
256-
; CHECK-NEXT: [[TMP18:%.*]] = load ptr, ptr [[ARRAYIDX11]], align 8, !tbaa [[TBAA30]]
243+
; CHECK-NEXT: store ptr [[SPEC_SELECT]], ptr [[TMP17]], align 8, !tbaa [[TBAA22]]
244+
; CHECK-NEXT: [[TMP18:%.*]] = load ptr, ptr [[ARRAYIDX11]], align 8, !tbaa [[TBAA25]]
257245
; CHECK-NEXT: [[BITS_TO_GO:%.*]] = getelementptr i8, ptr [[TMP18]], i64 4
258-
; CHECK-NEXT: store i32 0, ptr [[BITS_TO_GO]], align 4, !tbaa [[TBAA31]]
259-
; CHECK-NEXT: store i32 0, ptr [[TMP18]], align 8, !tbaa [[TBAA33]]
260-
; CHECK-NEXT: store i8 0, ptr [[TMP18]], align 8, !tbaa [[TBAA34]]
246+
; CHECK-NEXT: store i32 0, ptr [[BITS_TO_GO]], align 4, !tbaa [[TBAA26]]
247+
; CHECK-NEXT: store i32 0, ptr [[TMP18]], align 8, !tbaa [[TBAA28]]
248+
; CHECK-NEXT: store i8 0, ptr [[TMP18]], align 8, !tbaa [[TBAA29]]
261249
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1
262250
; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
263-
; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP36:![0-9]+]]
251+
; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP31:![0-9]+]]
264252
; CHECK: exit.loopexit:
265253
; CHECK-NEXT: br label [[FOR_END]]
266254
; CHECK: exit:
@@ -276,7 +264,7 @@ loop.preheader:
276264

277265
loop:
278266
%iv = phi i64 [ 0, %loop.preheader ], [ %iv.next, %loop ]
279-
%arrayidx11 = getelementptr %t0, ptr %1, i64 %iv
267+
%arrayidx11 = getelementptr i32, ptr %1, i64 %iv
280268
%2 = load ptr, ptr %0, align 8, !tbaa !0
281269
%3 = load i32, ptr %2, align 4, !tbaa !4
282270
%cmp12 = icmp eq i32 %3, 0
@@ -307,7 +295,7 @@ exit:
307295
!8 = !{!"p1 int", !1, i64 0}
308296
!9 = !{!"p1 omnipotent char", !1, i64 0}
309297
!10 = !{!11, !1, i64 112}
310-
!11 = !{!"t1", !1, i64 0, !12, i64 8, !1, i64 112}
298+
!11 = !{!"int", !1, i64 0, !12, i64 8, !1, i64 112}
311299
!12 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !9, i64 24, !8, i64 32, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !6, i64 56, !9, i64 64, !8, i64 72, !6, i64 80, !6, i64 84, !6, i64 88, !6, i64 92, !6, i64 96, !6, i64 100}
312300
!13 = !{!11, !1, i64 0}
313301
!14 = !{!15, !6, i64 4}

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