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AlexVlxAlexVlx
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Clean up unreachable BBs.
1 parent 7f88eb7 commit 3b727b9

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2 files changed

+62
-125
lines changed

2 files changed

+62
-125
lines changed

‎llvm/lib/Target/AMDGPU/AMDGPUExpandFeaturePredicates.cpp‎

Lines changed: 18 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -87,8 +87,9 @@ unfoldableFound(Function *Caller, GlobalVariable *P, Instruction *NoFold) {
8787
return {PreservedAnalyses::none(), false};
8888
}
8989

90-
std::pair<PreservedAnalyses, bool> handlePredicate(const GCNSubtarget &ST,
91-
GlobalVariable *P) {
90+
std::pair<PreservedAnalyses, bool>
91+
handlePredicate(const GCNSubtarget &ST, FunctionAnalysisManager &FAM,
92+
SmallPtrSet<Function *, 32> &Predicated, GlobalVariable *P) {
9293
setPredicate(ST, P);
9394

9495
SmallPtrSet<Instruction *, 32> ToFold;
@@ -98,18 +99,25 @@ std::pair<PreservedAnalyses, bool> handlePredicate(const GCNSubtarget &ST,
9899
return {PreservedAnalyses::all(), true};
99100

100101
do {
101-
auto *I = *ToFold.begin();
102+
Instruction *I = *ToFold.begin();
102103
ToFold.erase(I);
103104

104105
I->dropDroppableUses();
105106

107+
Function *F = I->getParent()->getParent();
108+
auto &DT = FAM.getResult<DominatorTreeAnalysis>(*F);
109+
DomTreeUpdater DTU(DT, DomTreeUpdater::UpdateStrategy::Lazy);
110+
106111
if (auto *C = ConstantFoldInstruction(I, P->getDataLayout())) {
107112
collectUsers(I, ToFold);
108113
I->replaceAllUsesWith(C);
109114
I->eraseFromParent();
110115
continue;
111-
} else if (I->isTerminator() && ConstantFoldTerminator(I->getParent())) {
112-
continue;
116+
} else if (I->isTerminator() &&
117+
ConstantFoldTerminator(I->getParent(), true, nullptr, &DTU)) {
118+
Predicated.insert(F);
119+
120+
continue;
113121
}
114122

115123
return unfoldableFound(I->getParent()->getParent(), P, I);
@@ -138,9 +146,11 @@ AMDGPUExpandFeaturePredicatesPass::run(Module &M, ModuleAnalysisManager &MAM) {
138146
const auto &ST = TM.getSubtarget<GCNSubtarget>(
139147
*find_if(M, [](auto &&F) { return !F.isIntrinsic(); }));
140148

149+
auto &FAM = MAM.getResult<FunctionAnalysisManagerModuleProxy>(M).getManager();
150+
SmallPtrSet<Function *, 32> Predicated;
141151
auto Ret = PreservedAnalyses::all();
142152
for (auto &&P : Predicates) {
143-
auto R = handlePredicate(ST, P);
153+
auto R = handlePredicate(ST, FAM, Predicated, P);
144154

145155
if (!R.second)
146156
break;
@@ -150,6 +160,8 @@ AMDGPUExpandFeaturePredicatesPass::run(Module &M, ModuleAnalysisManager &MAM) {
150160

151161
for (auto &&P : Predicates)
152162
P->eraseFromParent();
163+
for (auto &&F : Predicated)
164+
removeUnreachableBlocks(*F);
153165

154166
return Ret;
155167
}

‎llvm/test/CodeGen/AMDGPU/amdgpu-expand-feature-predicates.ll‎

Lines changed: 44 additions & 119 deletions
Original file line numberDiff line numberDiff line change
@@ -54,42 +54,23 @@ define amdgpu_kernel void @kernel(ptr addrspace(1) %p.coerce, i32 %x) {
5454
; GFX906-NEXT: [[ENTRY:.*:]]
5555
; GFX906-NEXT: [[TMP0:%.*]] = ptrtoint ptr addrspace(1) [[P_COERCE]] to i64
5656
; GFX906-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr
57-
; GFX906-NEXT: br label %[[IF_GFX1201_OR_GFX12_INSTS1:.*]]
58-
; GFX906: [[IF_GFX1201_OR_GFX12_INSTS1]]:
59-
; GFX906-NEXT: br label %[[IF_NOT_GFX906:.*]]
60-
; GFX906: [[IF_GFX1201_OR_GFX12_INSTS:.*:]]
61-
; GFX906-NEXT: call void @llvm.amdgcn.s.sleep.var(i32 [[X]])
62-
; GFX906-NEXT: br label %[[IF_NOT_GFX906]]
63-
; GFX906: [[IF_NOT_GFX906]]:
64-
; GFX906-NEXT: br label %[[IF_GFX1010_OR_GFX1102:.*]]
65-
; GFX906: [[IF_NOT_GFX907:.*:]]
66-
; GFX906-NEXT: call void @llvm.amdgcn.s.wait.event.export.ready()
67-
; GFX906-NEXT: br label %[[IF_END6:.*]]
68-
; GFX906: [[IF_GFX1010_OR_GFX1102]]:
57+
; GFX906-NEXT: br label %[[IF_GFX1201_OR_GFX12_INSTS:.*]]
58+
; GFX906: [[IF_GFX1201_OR_GFX12_INSTS]]:
59+
; GFX906-NEXT: br label %[[IF_NOT_GFX907:.*]]
60+
; GFX906: [[IF_NOT_GFX907]]:
61+
; GFX906-NEXT: br label %[[IF_GFX1010_OR_GFX1101:.*]]
62+
; GFX906: [[IF_GFX1010_OR_GFX1101]]:
6963
; GFX906-NEXT: br label %[[LOR_NOT_GFX1010:.*]]
7064
; GFX906: [[LOR_NOT_GFX1010]]:
7165
; GFX906-NEXT: br label %[[FOR_COND:.*]]
72-
; GFX906: [[IF_GFX1010_OR_GFX1101:.*:]]
73-
; GFX906-NEXT: call void @llvm.amdgcn.s.ttracedata.imm(i16 1)
74-
; GFX906-NEXT: br label %[[IF_END6]]
75-
; GFX906: [[IF_END6]]:
76-
; GFX906-NEXT: call void @llvm.assume(i1 true)
77-
; GFX906-NEXT: call void @llvm.assume(i1 true)
78-
; GFX906-NEXT: br label %[[FOR_COND]]
7966
; GFX906: [[FOR_COND]]:
8067
; GFX906-NEXT: [[DOTPROMOTED:%.*]] = load i32, ptr [[TMP1]], align 4
8168
; GFX906-NEXT: [[SUB_PEEL:%.*]] = sub nsw i32 [[DOTPROMOTED]], [[X]]
8269
; GFX906-NEXT: store i32 [[SUB_PEEL]], ptr [[TMP1]], align 4
83-
; GFX906-NEXT: br label %[[IF_GFX10_INSTS1:.*]]
84-
; GFX906: [[IF_GFX11_INSTS:.*:]]
85-
; GFX906-NEXT: call void @llvm.amdgcn.s.wait.event.export.ready()
86-
; GFX906-NEXT: br label %[[IF_END11:.*]]
87-
; GFX906: [[IF_GFX10_INSTS1]]:
88-
; GFX906-NEXT: br label %[[IF_END11]]
89-
; GFX906: [[IF_GFX10_INSTS:.*:]]
90-
; GFX906-NEXT: call void @llvm.amdgcn.s.ttracedata.imm(i16 1)
91-
; GFX906-NEXT: br label %[[IF_END11]]
92-
; GFX906: [[IF_END11]]:
70+
; GFX906-NEXT: br label %[[IF_GFX11_INSTS:.*]]
71+
; GFX906: [[IF_GFX11_INSTS]]:
72+
; GFX906-NEXT: br label %[[IF_GFX10_INSTS:.*]]
73+
; GFX906: [[IF_GFX10_INSTS]]:
9374
; GFX906-NEXT: call void @llvm.assume(i1 true)
9475
; GFX906-NEXT: [[DOTPROMOTED9:%.*]] = load i32, ptr [[TMP1]], align 4
9576
; GFX906-NEXT: [[SUB13_PEEL:%.*]] = sub nsw i32 [[DOTPROMOTED9]], [[X]]
@@ -101,41 +82,28 @@ define amdgpu_kernel void @kernel(ptr addrspace(1) %p.coerce, i32 %x) {
10182
; GFX1010-NEXT: [[ENTRY:.*:]]
10283
; GFX1010-NEXT: [[TMP0:%.*]] = ptrtoint ptr addrspace(1) [[P_COERCE]] to i64
10384
; GFX1010-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr
104-
; GFX1010-NEXT: br label %[[IF_GFX1201_OR_GFX12_INSTS1:.*]]
105-
; GFX1010: [[IF_GFX1201_OR_GFX12_INSTS1]]:
106-
; GFX1010-NEXT: br label %[[IF_END:.*]]
107-
; GFX1010: [[IF_GFX1201_OR_GFX12_INSTS:.*:]]
108-
; GFX1010-NEXT: call void @llvm.amdgcn.s.sleep.var(i32 [[X]])
109-
; GFX1010-NEXT: br label %[[IF_END]]
110-
; GFX1010: [[IF_END]]:
111-
; GFX1010-NEXT: br label %[[IF_NOT_GFX907:.*]]
112-
; GFX1010: [[IF_NOT_GFX907]]:
85+
; GFX1010-NEXT: br label %[[IF_GFX1201_OR_GFX12_INSTS:.*]]
86+
; GFX1010: [[IF_GFX1201_OR_GFX12_INSTS]]:
87+
; GFX1010-NEXT: br label %[[IF_NOT_GFX906:.*]]
88+
; GFX1010: [[IF_NOT_GFX906]]:
89+
; GFX1010-NEXT: br label %[[LOR_NOT_GFX1010:.*]]
90+
; GFX1010: [[LOR_NOT_GFX1010]]:
11391
; GFX1010-NEXT: call void @llvm.amdgcn.s.wait.event.export.ready()
11492
; GFX1010-NEXT: br label %[[IF_END6:.*]]
115-
; GFX1010: [[IF_NOT_GFX906:.*:]]
116-
; GFX1010-NEXT: br label %[[IF_GFX1010_OR_GFX1101:.*]]
117-
; GFX1010: [[LOR_NOT_GFX1010:.*:]]
118-
; GFX1010-NEXT: br label %[[FOR_COND:.*]]
119-
; GFX1010: [[IF_GFX1010_OR_GFX1101]]:
120-
; GFX1010-NEXT: call void @llvm.amdgcn.s.ttracedata.imm(i16 1)
121-
; GFX1010-NEXT: br label %[[IF_END6]]
12293
; GFX1010: [[IF_END6]]:
12394
; GFX1010-NEXT: call void @llvm.assume(i1 true)
12495
; GFX1010-NEXT: call void @llvm.assume(i1 true)
125-
; GFX1010-NEXT: br label %[[FOR_COND]]
96+
; GFX1010-NEXT: br label %[[FOR_COND:.*]]
12697
; GFX1010: [[FOR_COND]]:
12798
; GFX1010-NEXT: [[DOTPROMOTED:%.*]] = load i32, ptr [[TMP1]], align 4
12899
; GFX1010-NEXT: [[SUB_PEEL:%.*]] = sub nsw i32 [[DOTPROMOTED]], [[X]]
129100
; GFX1010-NEXT: store i32 [[SUB_PEEL]], ptr [[TMP1]], align 4
130-
; GFX1010-NEXT: br label %[[IF_ELSE8:.*]]
131-
; GFX1010: [[IF_GFX11_INSTS:.*:]]
132-
; GFX1010-NEXT: call void @llvm.amdgcn.s.wait.event.export.ready()
133-
; GFX1010-NEXT: br label %[[IF_END11:.*]]
134-
; GFX1010: [[IF_ELSE8]]:
101+
; GFX1010-NEXT: br label %[[IF_GFX11_INSTS:.*]]
102+
; GFX1010: [[IF_GFX11_INSTS]]:
135103
; GFX1010-NEXT: br label %[[IF_GFX10_INSTS:.*]]
136104
; GFX1010: [[IF_GFX10_INSTS]]:
137105
; GFX1010-NEXT: call void @llvm.amdgcn.s.ttracedata.imm(i16 1)
138-
; GFX1010-NEXT: br label %[[IF_END11]]
106+
; GFX1010-NEXT: br label %[[IF_END11:.*]]
139107
; GFX1010: [[IF_END11]]:
140108
; GFX1010-NEXT: call void @llvm.assume(i1 true)
141109
; GFX1010-NEXT: [[DOTPROMOTED9:%.*]] = load i32, ptr [[TMP1]], align 4
@@ -148,25 +116,15 @@ define amdgpu_kernel void @kernel(ptr addrspace(1) %p.coerce, i32 %x) {
148116
; GFX1101-NEXT: [[ENTRY:.*:]]
149117
; GFX1101-NEXT: [[TMP0:%.*]] = ptrtoint ptr addrspace(1) [[P_COERCE]] to i64
150118
; GFX1101-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr
151-
; GFX1101-NEXT: br label %[[IF_GFX1201_OR_GFX12_INSTS1:.*]]
152-
; GFX1101: [[IF_GFX1201_OR_GFX12_INSTS1]]:
119+
; GFX1101-NEXT: br label %[[IF_GFX1201_OR_GFX12_INSTS:.*]]
120+
; GFX1101: [[IF_GFX1201_OR_GFX12_INSTS]]:
153121
; GFX1101-NEXT: br label %[[IF_END:.*]]
154-
; GFX1101: [[IF_GFX1201_OR_GFX12_INSTS:.*:]]
155-
; GFX1101-NEXT: call void @llvm.amdgcn.s.sleep.var(i32 [[X]])
156-
; GFX1101-NEXT: br label %[[IF_END]]
157122
; GFX1101: [[IF_END]]:
158123
; GFX1101-NEXT: br label %[[IF_NOT_GFX907:.*]]
159124
; GFX1101: [[IF_NOT_GFX907]]:
160125
; GFX1101-NEXT: call void @llvm.amdgcn.s.wait.event.export.ready()
161-
; GFX1101-NEXT: br label %[[IF_END6:.*]]
162-
; GFX1101: [[IF_NOT_GFX906:.*:]]
163-
; GFX1101-NEXT: br label %[[LOR_NOT_GFX1010:.*]]
164-
; GFX1101: [[LOR_NOT_GFX1010]]:
165-
; GFX1101-NEXT: br label %[[IF_GFX1010_OR_GFX1101:.*]]
166-
; GFX1101: [[IF_GFX1010_OR_GFX1101]]:
167-
; GFX1101-NEXT: call void @llvm.amdgcn.s.ttracedata.imm(i16 1)
168-
; GFX1101-NEXT: br label %[[IF_END6]]
169-
; GFX1101: [[IF_END6]]:
126+
; GFX1101-NEXT: br label %[[IF_NOT_GFX906:.*]]
127+
; GFX1101: [[IF_NOT_GFX906]]:
170128
; GFX1101-NEXT: call void @llvm.assume(i1 true)
171129
; GFX1101-NEXT: call void @llvm.assume(i1 true)
172130
; GFX1101-NEXT: br label %[[FOR_COND:.*]]
@@ -177,13 +135,8 @@ define amdgpu_kernel void @kernel(ptr addrspace(1) %p.coerce, i32 %x) {
177135
; GFX1101-NEXT: br label %[[IF_GFX11_INSTS:.*]]
178136
; GFX1101: [[IF_GFX11_INSTS]]:
179137
; GFX1101-NEXT: call void @llvm.amdgcn.s.wait.event.export.ready()
180-
; GFX1101-NEXT: br label %[[IF_END11:.*]]
181-
; GFX1101: [[IF_ELSE8:.*:]]
182-
; GFX1101-NEXT: br label %[[IF_GFX10_INSTS:.*]]
183-
; GFX1101: [[IF_GFX10_INSTS]]:
184-
; GFX1101-NEXT: call void @llvm.amdgcn.s.ttracedata.imm(i16 1)
185-
; GFX1101-NEXT: br label %[[IF_END11]]
186-
; GFX1101: [[IF_END11]]:
138+
; GFX1101-NEXT: br label %[[IF_ELSE8:.*]]
139+
; GFX1101: [[IF_ELSE8]]:
187140
; GFX1101-NEXT: call void @llvm.assume(i1 true)
188141
; GFX1101-NEXT: [[DOTPROMOTED9:%.*]] = load i32, ptr [[TMP1]], align 4
189142
; GFX1101-NEXT: [[SUB13_PEEL:%.*]] = sub nsw i32 [[DOTPROMOTED9]], [[X]]
@@ -195,42 +148,28 @@ define amdgpu_kernel void @kernel(ptr addrspace(1) %p.coerce, i32 %x) {
195148
; GFX1201-NEXT: [[ENTRY:.*:]]
196149
; GFX1201-NEXT: [[TMP0:%.*]] = ptrtoint ptr addrspace(1) [[P_COERCE]] to i64
197150
; GFX1201-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr
198-
; GFX1201-NEXT: br label %[[IF_GFX1201_OR_GFX12_INSTS:.*]]
199-
; GFX1201: [[LOR_NOT_GFX1201:.*:]]
200-
; GFX1201-NEXT: br label %[[IF_GFX1201_OR_GFX12_INSTS]]
201-
; GFX1201: [[IF_GFX1201_OR_GFX12_INSTS]]:
151+
; GFX1201-NEXT: br label %[[LOR_NOT_GFX1201:.*]]
152+
; GFX1201: [[LOR_NOT_GFX1201]]:
202153
; GFX1201-NEXT: call void @llvm.amdgcn.s.sleep.var(i32 [[X]])
203-
; GFX1201-NEXT: br label %[[IF_END:.*]]
204-
; GFX1201: [[IF_END]]:
205-
; GFX1201-NEXT: br label %[[IF_NOT_GFX907:.*]]
206-
; GFX1201: [[IF_NOT_GFX907]]:
154+
; GFX1201-NEXT: br label %[[IF_NOT_GFX906:.*]]
155+
; GFX1201: [[IF_NOT_GFX906]]:
156+
; GFX1201-NEXT: br label %[[IF_GFX1010_OR_GFX1101:.*]]
157+
; GFX1201: [[IF_GFX1010_OR_GFX1101]]:
207158
; GFX1201-NEXT: call void @llvm.amdgcn.s.wait.event.export.ready()
208159
; GFX1201-NEXT: br label %[[IF_END6:.*]]
209-
; GFX1201: [[IF_NOT_GFX906:.*:]]
210-
; GFX1201-NEXT: br label %[[IF_GFX1010_OR_GFX1102:.*]]
211-
; GFX1201: [[IF_GFX1010_OR_GFX1102]]:
212-
; GFX1201-NEXT: br label %[[FOR_COND:.*]]
213-
; GFX1201: [[IF_GFX1010_OR_GFX1101:.*:]]
214-
; GFX1201-NEXT: call void @llvm.amdgcn.s.ttracedata.imm(i16 1)
215-
; GFX1201-NEXT: br label %[[IF_END6]]
216160
; GFX1201: [[IF_END6]]:
217161
; GFX1201-NEXT: call void @llvm.assume(i1 true)
218162
; GFX1201-NEXT: call void @llvm.assume(i1 true)
219-
; GFX1201-NEXT: br label %[[FOR_COND]]
163+
; GFX1201-NEXT: br label %[[FOR_COND:.*]]
220164
; GFX1201: [[FOR_COND]]:
221165
; GFX1201-NEXT: [[DOTPROMOTED:%.*]] = load i32, ptr [[TMP1]], align 4
222166
; GFX1201-NEXT: [[SUB_PEEL:%.*]] = sub nsw i32 [[DOTPROMOTED]], [[X]]
223167
; GFX1201-NEXT: store i32 [[SUB_PEEL]], ptr [[TMP1]], align 4
224168
; GFX1201-NEXT: br label %[[IF_GFX11_INSTS:.*]]
225169
; GFX1201: [[IF_GFX11_INSTS]]:
226170
; GFX1201-NEXT: call void @llvm.amdgcn.s.wait.event.export.ready()
227-
; GFX1201-NEXT: br label %[[IF_END11:.*]]
228-
; GFX1201: [[IF_ELSE8:.*:]]
229-
; GFX1201-NEXT: br label %[[IF_GFX10_INSTS:.*]]
230-
; GFX1201: [[IF_GFX10_INSTS]]:
231-
; GFX1201-NEXT: call void @llvm.amdgcn.s.ttracedata.imm(i16 1)
232-
; GFX1201-NEXT: br label %[[IF_END11]]
233-
; GFX1201: [[IF_END11]]:
171+
; GFX1201-NEXT: br label %[[IF_ELSE8:.*]]
172+
; GFX1201: [[IF_ELSE8]]:
234173
; GFX1201-NEXT: call void @llvm.assume(i1 true)
235174
; GFX1201-NEXT: [[DOTPROMOTED9:%.*]] = load i32, ptr [[TMP1]], align 4
236175
; GFX1201-NEXT: [[SUB13_PEEL:%.*]] = sub nsw i32 [[DOTPROMOTED9]], [[X]]
@@ -242,42 +181,28 @@ define amdgpu_kernel void @kernel(ptr addrspace(1) %p.coerce, i32 %x) {
242181
; GFX1201-W64-NEXT: [[ENTRY:.*:]]
243182
; GFX1201-W64-NEXT: [[TMP0:%.*]] = ptrtoint ptr addrspace(1) [[P_COERCE]] to i64
244183
; GFX1201-W64-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr
245-
; GFX1201-W64-NEXT: br label %[[IF_GFX1201_OR_GFX12_INSTS:.*]]
246-
; GFX1201-W64: [[LOR_NOT_GFX1201:.*:]]
247-
; GFX1201-W64-NEXT: br label %[[IF_GFX1201_OR_GFX12_INSTS]]
248-
; GFX1201-W64: [[IF_GFX1201_OR_GFX12_INSTS]]:
184+
; GFX1201-W64-NEXT: br label %[[LOR_NOT_GFX1201:.*]]
185+
; GFX1201-W64: [[LOR_NOT_GFX1201]]:
249186
; GFX1201-W64-NEXT: call void @llvm.amdgcn.s.sleep.var(i32 [[X]])
250-
; GFX1201-W64-NEXT: br label %[[IF_END:.*]]
251-
; GFX1201-W64: [[IF_END]]:
252-
; GFX1201-W64-NEXT: br label %[[IF_NOT_GFX907:.*]]
253-
; GFX1201-W64: [[IF_NOT_GFX907]]:
187+
; GFX1201-W64-NEXT: br label %[[IF_NOT_GFX906:.*]]
188+
; GFX1201-W64: [[IF_NOT_GFX906]]:
189+
; GFX1201-W64-NEXT: br label %[[IF_GFX1010_OR_GFX1101:.*]]
190+
; GFX1201-W64: [[IF_GFX1010_OR_GFX1101]]:
254191
; GFX1201-W64-NEXT: call void @llvm.amdgcn.s.wait.event.export.ready()
255192
; GFX1201-W64-NEXT: br label %[[IF_END6:.*]]
256-
; GFX1201-W64: [[IF_NOT_GFX906:.*:]]
257-
; GFX1201-W64-NEXT: br label %[[IF_GFX1010_OR_GFX1102:.*]]
258-
; GFX1201-W64: [[IF_GFX1010_OR_GFX1102]]:
259-
; GFX1201-W64-NEXT: br label %[[FOR_COND:.*]]
260-
; GFX1201-W64: [[IF_GFX1010_OR_GFX1101:.*:]]
261-
; GFX1201-W64-NEXT: call void @llvm.amdgcn.s.ttracedata.imm(i16 1)
262-
; GFX1201-W64-NEXT: br label %[[IF_END6]]
263193
; GFX1201-W64: [[IF_END6]]:
264194
; GFX1201-W64-NEXT: call void @llvm.assume(i1 true)
265195
; GFX1201-W64-NEXT: call void @llvm.assume(i1 true)
266-
; GFX1201-W64-NEXT: br label %[[FOR_COND]]
196+
; GFX1201-W64-NEXT: br label %[[FOR_COND:.*]]
267197
; GFX1201-W64: [[FOR_COND]]:
268198
; GFX1201-W64-NEXT: [[DOTPROMOTED:%.*]] = load i32, ptr [[TMP1]], align 4
269199
; GFX1201-W64-NEXT: [[SUB_PEEL:%.*]] = sub nsw i32 [[DOTPROMOTED]], [[X]]
270200
; GFX1201-W64-NEXT: store i32 [[SUB_PEEL]], ptr [[TMP1]], align 4
271201
; GFX1201-W64-NEXT: br label %[[IF_GFX11_INSTS:.*]]
272202
; GFX1201-W64: [[IF_GFX11_INSTS]]:
273203
; GFX1201-W64-NEXT: call void @llvm.amdgcn.s.wait.event.export.ready()
274-
; GFX1201-W64-NEXT: br label %[[IF_END11:.*]]
275-
; GFX1201-W64: [[IF_ELSE8:.*:]]
276-
; GFX1201-W64-NEXT: br label %[[IF_GFX10_INSTS:.*]]
277-
; GFX1201-W64: [[IF_GFX10_INSTS]]:
278-
; GFX1201-W64-NEXT: call void @llvm.amdgcn.s.ttracedata.imm(i16 1)
279-
; GFX1201-W64-NEXT: br label %[[IF_END11]]
280-
; GFX1201-W64: [[IF_END11]]:
204+
; GFX1201-W64-NEXT: br label %[[IF_ELSE8:.*]]
205+
; GFX1201-W64: [[IF_ELSE8]]:
281206
; GFX1201-W64-NEXT: call void @llvm.assume(i1 true)
282207
; GFX1201-W64-NEXT: [[DOTPROMOTED9:%.*]] = load i32, ptr [[TMP1]], align 4
283208
; GFX1201-W64-NEXT: [[SUB13_PEEL:%.*]] = sub nsw i32 [[DOTPROMOTED9]], [[X]]

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