[RISCV] Add TH_EXT(U) to hasAllNBitUsers in RISCVOptWInstrs.

Author: topperc

llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp

@@ -356,6 +356,14 @@ static bool hasAllNBitUsers(const MachineInstr &OrigMI,
           return false;
         Worklist.emplace_back(UserMI, Bits);
         break;
+      case RISCV::TH_EXT:
+      case RISCV::TH_EXTU:
+        unsigned Msb = UserMI->getOperand(2).getImm();
+        unsigned Lsb = UserMI->getOperand(3).getImm();
+        // Behavior of Msb < Lsb is not well documented.
+        if (Msb >= Lsb && Bits > Msb)
+          break;
+        return false;
       }
     }
   }

llvm/test/CodeGen/RISCV/bitextract-mac.ll

@@ -107,7 +107,7 @@ define i32 @f(i32 %A, i32 %B, i32 %C) {
 ;
 ; RV64XTHEADBB-LABEL: f:
 ; RV64XTHEADBB:       # %bb.0: # %entry
-; RV64XTHEADBB-NEXT:    mulw a0, a1, a0
+; RV64XTHEADBB-NEXT:    mul a0, a1, a0
 ; RV64XTHEADBB-NEXT:    th.extu a1, a0, 5, 2
 ; RV64XTHEADBB-NEXT:    th.extu a0, a0, 11, 5
 ; RV64XTHEADBB-NEXT:    mul a0, a1, a0
@@ -116,7 +116,7 @@ define i32 @f(i32 %A, i32 %B, i32 %C) {
 ;
 ; RV64XTHEAD-LABEL: f:
 ; RV64XTHEAD:       # %bb.0: # %entry
-; RV64XTHEAD-NEXT:    mulw a0, a1, a0
+; RV64XTHEAD-NEXT:    mul a0, a1, a0
 ; RV64XTHEAD-NEXT:    th.extu a1, a0, 5, 2
 ; RV64XTHEAD-NEXT:    th.extu a0, a0, 11, 5
 ; RV64XTHEAD-NEXT:    th.mulah a2, a1, a0

llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll

@@ -2438,7 +2438,7 @@ define i16 @test_ctpop_i16(i16 %a) nounwind {
 ; RV64XTHEADBB-NEXT:    and a0, a0, a2
 ; RV64XTHEADBB-NEXT:    add a0, a1, a0
 ; RV64XTHEADBB-NEXT:    srli a1, a0, 4
-; RV64XTHEADBB-NEXT:    addw a0, a0, a1
+; RV64XTHEADBB-NEXT:    add a0, a0, a1
 ; RV64XTHEADBB-NEXT:    th.extu a1, a0, 11, 8
 ; RV64XTHEADBB-NEXT:    andi a0, a0, 15
 ; RV64XTHEADBB-NEXT:    add a0, a0, a1

llvm/test/CodeGen/RISCV/rv64xtheadbb.ll

@@ -1244,10 +1244,9 @@ define signext i32 @hasAllNBitUsers_extu(i64 %arg1, i64 %arg2, i64 %arg3)  {
 ; RV64XTHEADBB-NEXT:    # =>This Inner Loop Header: Depth=1
 ; RV64XTHEADBB-NEXT:    th.extu a0, a0, 16, 15
 ; RV64XTHEADBB-NEXT:    addi a2, a2, 1
-; RV64XTHEADBB-NEXT:    add a0, a0, a1
+; RV64XTHEADBB-NEXT:    addw a0, a0, a1
 ; RV64XTHEADBB-NEXT:    bltu a2, a3, .LBB38_1
 ; RV64XTHEADBB-NEXT:  # %bb.2: # %bb7
-; RV64XTHEADBB-NEXT:    sext.w a0, a0
 ; RV64XTHEADBB-NEXT:    ret
 entry:
   br label %bb2
@@ -1290,10 +1289,9 @@ define signext i32 @hasAllNBitUsers_ext(i64 %arg1, i64 %arg2, i64 %arg3)  {
 ; RV64XTHEADBB-NEXT:    # =>This Inner Loop Header: Depth=1
 ; RV64XTHEADBB-NEXT:    th.extu a0, a0, 16, 15
 ; RV64XTHEADBB-NEXT:    addi a2, a2, 1
-; RV64XTHEADBB-NEXT:    add a0, a0, a1
+; RV64XTHEADBB-NEXT:    addw a0, a0, a1
 ; RV64XTHEADBB-NEXT:    bltu a2, a3, .LBB39_1
 ; RV64XTHEADBB-NEXT:  # %bb.2: # %bb7
-; RV64XTHEADBB-NEXT:    sext.w a0, a0
 ; RV64XTHEADBB-NEXT:    ret
 entry:
   br label %bb2