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Back out r130862; it appears to be breaking bootstrap.
llvm-svn: 130867
1 parent 480cb99 commit 3bd79ba

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3 files changed

+29
-67
lines changed

3 files changed

+29
-67
lines changed

llvm/lib/CodeGen/MachineCSE.cpp

Lines changed: 27 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -82,8 +82,7 @@ namespace {
8282
MachineBasicBlock::const_iterator E) const ;
8383
bool hasLivePhysRegDefUses(const MachineInstr *MI,
8484
const MachineBasicBlock *MBB,
85-
SmallSet<unsigned,8> &PhysRefs,
86-
SmallVector<unsigned,8> &PhysDefs) const;
85+
SmallSet<unsigned,8> &PhysRefs) const;
8786
bool PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI,
8887
SmallSet<unsigned,8> &PhysRefs) const;
8988
bool isCSECandidate(MachineInstr *MI);
@@ -190,8 +189,7 @@ MachineCSE::isPhysDefTriviallyDead(unsigned Reg,
190189
/// instruction does not uses a physical register.
191190
bool MachineCSE::hasLivePhysRegDefUses(const MachineInstr *MI,
192191
const MachineBasicBlock *MBB,
193-
SmallSet<unsigned,8> &PhysRefs,
194-
SmallVector<unsigned,8> &PhysDefs) const{
192+
SmallSet<unsigned,8> &PhysRefs) const {
195193
MachineBasicBlock::const_iterator I = MI; I = llvm::next(I);
196194
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
197195
const MachineOperand &MO = MI->getOperand(i);
@@ -208,7 +206,6 @@ bool MachineCSE::hasLivePhysRegDefUses(const MachineInstr *MI,
208206
if (MO.isDef() &&
209207
(MO.isDead() || isPhysDefTriviallyDead(Reg, I, MBB->end())))
210208
continue;
211-
PhysDefs.push_back(Reg);
212209
PhysRefs.insert(Reg);
213210
for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias)
214211
PhysRefs.insert(*Alias);
@@ -219,40 +216,35 @@ bool MachineCSE::hasLivePhysRegDefUses(const MachineInstr *MI,
219216

220217
bool MachineCSE::PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI,
221218
SmallSet<unsigned,8> &PhysRefs) const {
222-
// Look backward from MI to find CSMI.
219+
// For now conservatively returns false if the common subexpression is
220+
// not in the same basic block as the given instruction.
221+
MachineBasicBlock *MBB = MI->getParent();
222+
if (CSMI->getParent() != MBB)
223+
return false;
224+
MachineBasicBlock::const_iterator I = CSMI; I = llvm::next(I);
225+
MachineBasicBlock::const_iterator E = MI;
223226
unsigned LookAheadLeft = LookAheadLimit;
224-
MachineBasicBlock::const_reverse_iterator I(MI);
225-
MachineBasicBlock::const_reverse_iterator E(MI->getParent()->rend());
226227
while (LookAheadLeft) {
227-
while (LookAheadLeft && I != E) {
228-
// Skip over dbg_value's.
229-
while (I != E && I->isDebugValue())
230-
++I;
231-
232-
if (&*I == CSMI)
233-
return true;
228+
// Skip over dbg_value's.
229+
while (I != E && I->isDebugValue())
230+
++I;
234231

235-
for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
236-
const MachineOperand &MO = I->getOperand(i);
237-
if (!MO.isReg() || !MO.isDef())
238-
continue;
239-
unsigned MOReg = MO.getReg();
240-
if (TargetRegisterInfo::isVirtualRegister(MOReg))
241-
continue;
242-
if (PhysRefs.count(MOReg))
243-
return false;
244-
}
232+
if (I == E)
233+
return true;
245234

246-
--LookAheadLeft;
247-
++I;
235+
for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
236+
const MachineOperand &MO = I->getOperand(i);
237+
if (!MO.isReg() || !MO.isDef())
238+
continue;
239+
unsigned MOReg = MO.getReg();
240+
if (TargetRegisterInfo::isVirtualRegister(MOReg))
241+
continue;
242+
if (PhysRefs.count(MOReg))
243+
return false;
248244
}
249-
// Go back another BB; for now, only go back at most one BB.
250-
MachineBasicBlock *CSBB = CSMI->getParent();
251-
MachineBasicBlock *BB = MI->getParent();
252-
if (!CSBB->isSuccessor(BB) || BB->pred_size() != 1)
253-
return false;
254-
I = CSBB->rbegin();
255-
E = CSBB->rend();
245+
246+
--LookAheadLeft;
247+
++I;
256248
}
257249

258250
return false;
@@ -403,8 +395,7 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
403395
// used, then it's not safe to replace it with a common subexpression.
404396
// It's also not safe if the instruction uses physical registers.
405397
SmallSet<unsigned,8> PhysRefs;
406-
SmallVector<unsigned,8> DirectPhysRefs;
407-
if (FoundCSE && hasLivePhysRegDefUses(MI, MBB, PhysRefs, DirectPhysRefs)) {
398+
if (FoundCSE && hasLivePhysRegDefUses(MI, MBB, PhysRefs)) {
408399
FoundCSE = false;
409400

410401
// ... Unless the CS is local and it also defines the physical register
@@ -457,13 +448,6 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
457448
MRI->clearKillFlags(CSEPairs[i].second);
458449
}
459450
MI->eraseFromParent();
460-
if (!DirectPhysRefs.empty() && CSMI->getParent() != MBB) {
461-
assert(CSMI->getParent()->isSuccessor(MBB));
462-
SmallVector<unsigned,8>::iterator PI = DirectPhysRefs.begin(),
463-
PE = DirectPhysRefs.end();
464-
for (; PI != PE; ++PI)
465-
MBB->addLiveIn(*PI);
466-
}
467451
++NumCSEs;
468452
if (!PhysRefs.empty())
469453
++NumPhysCSEs;

llvm/test/CodeGen/Thumb2/thumb2-cbnz.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -21,8 +21,8 @@ bb7: ; preds = %bb3
2121

2222
bb9: ; preds = %bb7
2323
; CHECK: cmp r0, #0
24-
; CHECK-NOT: cmp
25-
; CHECK: cbnz
24+
; CHECK: cmp r0, #0
25+
; CHECK-NEXT: cbnz
2626
%0 = tail call double @floor(double %b) nounwind readnone ; <double> [#uses=0]
2727
br label %bb11
2828

llvm/test/CodeGen/X86/cmp-redundant.ll

Lines changed: 0 additions & 22 deletions
This file was deleted.

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