fixup! [InferAddressSpaces] Handle llvm.lifetime

Author: Zhenhao Yang

llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll

@@ -20,4 +20,4 @@ define i32 @lifetime_flat_pointer() {
 }
 
 declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
-declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)

llvm/test/Transforms/InferAddressSpaces/NVPTX/lifetime.ll

@@ -20,5 +20,23 @@ define i32 @lifetime_flat_pointer() {
   ret i32 %ret
 }
 
+define i32 @lifetime_flat_pointer2() {
+; CHECK-LABEL: define i32 @lifetime_flat_pointer2() {
+; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca i32, align 4
+; CHECK-NEXT:    [[TMP1:%.*]] = addrspacecast ptr [[ALLOCA]] to ptr addrspace(5)
+; CHECK-NEXT:    call void @llvm.lifetime.start.p5(i64 4, ptr addrspace(5) [[TMP1]])
+; CHECK-NEXT:    store i32 1, ptr addrspace(5) [[TMP1]], align 4
+; CHECK-NEXT:    %ret = load i32, ptr addrspace(5) [[TMP1]], align 4
+; CHECK-NEXT:    call void @llvm.lifetime.end.p5(i64 4, ptr addrspace(5) [[TMP1]])
+; CHECK-NEXT:    ret i32 %ret
+;
+  %alloca = alloca i32, align 4
+  call void @llvm.lifetime.start.p5(i64 4 , ptr %alloca)
+  store i32 1, ptr %alloca, align 4
+  %ret = load i32, ptr %alloca, align 4
+  call void @llvm.lifetime.end.p5(i64 4 , ptr %alloca)
+  ret i32 %ret
+}
+
 declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
 declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)