Fixups

Author: MacDue

llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp

@@ -92,8 +92,9 @@ class AArch64ExpandPseudo : public MachineFunctionPass {
   bool expandCALL_BTI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI);
   bool expandStoreSwiftAsyncContext(MachineBasicBlock &MBB,
                                     MachineBasicBlock::iterator MBBI);
-  MachineBasicBlock *expandCommitOrRestoreZA(MachineBasicBlock &MBB,
-                                             MachineBasicBlock::iterator MBBI);
+  MachineBasicBlock *
+  expandCommitOrRestoreZASave(MachineBasicBlock &MBB,
+                              MachineBasicBlock::iterator MBBI);
   MachineBasicBlock *expandCondSMToggle(MachineBasicBlock &MBB,
                                         MachineBasicBlock::iterator MBBI);
 };
@@ -992,13 +993,12 @@ bool AArch64ExpandPseudo::expandStoreSwiftAsyncContext(
 
 static constexpr unsigned ZERO_ALL_ZA_MASK = 0b11111111;
 
-MachineBasicBlock *
-AArch64ExpandPseudo::expandCommitOrRestoreZA(MachineBasicBlock &MBB,
-                                             MachineBasicBlock::iterator MBBI) {
+MachineBasicBlock *AArch64ExpandPseudo::expandCommitOrRestoreZASave(
+    MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) {
   MachineInstr &MI = *MBBI;
   bool IsRestoreZA = MI.getOpcode() == AArch64::RestoreZAPseudo;
   assert((MI.getOpcode() == AArch64::RestoreZAPseudo ||
-          MI.getOpcode() == AArch64::CommitZAPseudo) &&
+          MI.getOpcode() == AArch64::CommitZASavePseudo) &&
          "Expected ZA commit or restore");
   assert((std::next(MBBI) != MBB.end() ||
           MI.getParent()->successors().begin() !=
@@ -1669,9 +1669,9 @@ bool AArch64ExpandPseudo::expandMI(MachineBasicBlock &MBB,
      return expandCALL_BTI(MBB, MBBI);
    case AArch64::StoreSwiftAsyncContext:
      return expandStoreSwiftAsyncContext(MBB, MBBI);
-   case AArch64::CommitZAPseudo:
+   case AArch64::CommitZASavePseudo:
    case AArch64::RestoreZAPseudo: {
-     auto *NewMBB = expandCommitOrRestoreZA(MBB, MBBI);
+     auto *NewMBB = expandCommitOrRestoreZASave(MBB, MBBI);
      if (NewMBB != &MBB)
        NextMBBI = MBB.end(); // The NextMBBI iterator is invalidated.
      return true;

llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td

@@ -99,7 +99,7 @@ let hasSideEffects = 1 in {
   def RequiresZASavePseudo : Pseudo<(outs), (ins), []>, Sched<[]>;
 }
 
-def CommitZAPseudo
+def CommitZASavePseudo
   : Pseudo<(outs),
            (ins GPR64:$tpidr2_el0, i64imm:$commit_routine, variable_ops), []>,
            Sched<[]>;

llvm/lib/Target/AArch64/MachineSMEABIPass.cpp

@@ -107,8 +107,10 @@ static bool isZAorZT0RegOp(const TargetRegisterInfo &TRI,
   });
 }
 
+/// Returns the required ZA state needed before \p MI and an iterator pointing
+/// to where any code required to change the ZA state should be inserted.
 static std::pair<ZAState, MachineBasicBlock::iterator>
-getInstNeededZAState(const TargetRegisterInfo &TRI, MachineInstr &MI,
+getZAStateBeforeInst(const TargetRegisterInfo &TRI, MachineInstr &MI,
                      bool ZALiveAtReturn) {
   MachineBasicBlock::iterator InsertPt(MI);
 
@@ -254,7 +256,7 @@ void MachineSMEABI::collectNeededZAStates(SMEAttrs SMEFnAttrs) {
       MachineBasicBlock::iterator MBBI(MI);
       LiveUnits.stepBackward(MI);
       LiveRegs PhysLiveRegs = GetPhysLiveRegs();
-      auto [NeededState, InsertPt] = getInstNeededZAState(
+      auto [NeededState, InsertPt] = getZAStateBeforeInst(
           *TRI, MI, /*ZALiveAtReturn=*/SMEFnAttrs.hasSharedZAInterface());
       assert((InsertPt == MBBI ||
               InsertPt->getOpcode() == AArch64::ADJCALLSTACKDOWN) &&
@@ -545,14 +547,14 @@ void MachineSMEABI::emitNewZAPrologue(MachineBasicBlock &MBB,
       .addReg(TPIDR2EL0, RegState::Define)
       .addImm(AArch64SysReg::TPIDR2_EL0);
   // If TPIDR2_EL0 is non-zero, commit the lazy save.
-  auto CommitZA =
-      BuildMI(MBB, MBBI, DL, TII->get(AArch64::CommitZAPseudo))
+  auto CommitZASave =
+      BuildMI(MBB, MBBI, DL, TII->get(AArch64::CommitZASavePseudo))
           .addReg(TPIDR2EL0)
           .addExternalSymbol(TLI->getLibcallName(RTLIB::SMEABI_TPIDR2_SAVE))
           .addRegMask(TRI->SMEABISupportRoutinesCallPreservedMaskFromX0());
   // NOTE: Functions that only use ZT0 don't need to zero ZA.
   if (MF->getInfo<AArch64FunctionInfo>()->getSMEFnAttrs().hasZAState())
-    CommitZA.addDef(AArch64::ZAB0, RegState::ImplicitDefine);
+    CommitZASave.addDef(AArch64::ZAB0, RegState::ImplicitDefine);
   // Enable ZA (as ZA could have previously been in the OFF state).
   BuildMI(MBB, MBBI, DL, TII->get(AArch64::MSRpstatesvcrImm1))
       .addImm(AArch64SVCR::SVCRZA)