Skip to content

Commit 3c9ec7b

Browse files
committed
remove unnecessary files, reorganize
1 parent ac53a36 commit 3c9ec7b

File tree

6 files changed

+19
-420
lines changed

6 files changed

+19
-420
lines changed

clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -83,9 +83,11 @@ __m512i test_mm512_ror_epi32(__m512i __A) {
8383
// CIR: {{%.*}} = cir.cast integral {{%.*}} : !s32i -> !u32i
8484
// CIR: {{%.*}} = cir.vec.splat {{%.*}} : !u32i, !cir.vector<16 x !u32i>
8585
// CIR: {{%.*}} = cir.call_llvm_intrinsic "fshr" {{%.*}}: (!cir.vector<16 x !s32i>, !cir.vector<16 x !s32i>, !cir.vector<16 x !u32i>) -> !cir.vector<16 x !s32i>
86+
8687
// LLVM-LABEL: test_mm512_ror_epi32
8788
// LLVM: %[[CASTED_VAR:.*]] = bitcast <8 x i64> {{%.*}} to <16 x i32>
8889
// LLVM: {{%.*}} = call <16 x i32> @llvm.fshr.v16i32(<16 x i32> %[[CASTED_VAR]], <16 x i32> %[[CASTED_VAR]], <16 x i32> splat (i32 5))
90+
8991
// OGCG-LABEL: test_mm512_ror_epi32
9092
// OGCG: %[[CASTED_VAR:.*]] = bitcast <8 x i64> {{%.*}} to <16 x i32>
9193
// OGCG: {{%.*}} = call <16 x i32> @llvm.fshr.v16i32(<16 x i32> %[[CASTED_VAR]], <16 x i32> %[[CASTED_VAR]], <16 x i32> splat (i32 5))
@@ -98,9 +100,11 @@ __m512i test_mm512_ror_epi64(__m512i __A) {
98100
// CIR: {{%.*}} = cir.cast integral {{%.*}} : !u32i -> !u64i
99101
// CIR: {{%.*}} = cir.vec.splat {{%.*}} : !u64i, !cir.vector<8 x !u64i>
100102
// CIR: {{%.*}} = cir.call_llvm_intrinsic "fshr" {{%.*}}: (!cir.vector<8 x !s64i>, !cir.vector<8 x !s64i>, !cir.vector<8 x !u64i>) -> !cir.vector<8 x !s64i>
103+
101104
// LLVM-LABEL: test_mm512_ror_epi64
102105
// LLVM: %[[VAR:.*]] = load <8 x i64>, ptr {{%.*}}, align 64
103106
// LLVM: {{%.*}} = call <8 x i64> @llvm.fshr.v8i64(<8 x i64> %[[VAR]], <8 x i64> %[[VAR]], <8 x i64> splat (i64 5))
107+
104108
// OGCG-LABEL: test_mm512_ror_epi64
105109
// OGCG: %[[VAR:.*]] = load <8 x i64>, ptr {{%.*}}, align 64
106110
// OGCG: {{%.*}} = call <8 x i64> @llvm.fshr.v8i64(<8 x i64> %[[VAR]], <8 x i64> %[[VAR]], <8 x i64> splat (i64 5))

0 commit comments

Comments
 (0)