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[RISCV] Cleanup some vector tests. NFC
Some tests had scalable vector intrinsic names with fixed vector types. Some had types in the wrong order. Remove scalable vector test from fixed vector files. Also replace insert+shuffle constexprs with fixed constant vectors.
1 parent a4deb14 commit 3d6c63d

9 files changed

+486
-883
lines changed

‎llvm/test/CodeGen/RISCV/rvv/fixed-vector-trunc-vp-mask.ll

Lines changed: 21 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -2,77 +2,77 @@
22
; RUN: llc -mtriple=riscv32 -mattr=+v -riscv-v-vector-bits-min=128 -verify-machineinstrs < %s | FileCheck %s
33
; RUN: llc -mtriple=riscv64 -mattr=+v -riscv-v-vector-bits-min=128 -verify-machineinstrs < %s | FileCheck %s
44

5-
declare <2 x i1> @llvm.vp.trunc.nxv2i16.nxv2i1(<2 x i16>, <2 x i1>, i32)
5+
declare <2 x i1> @llvm.vp.trunc.v2i1.v2i16(<2 x i16>, <2 x i1>, i32)
66

7-
define <2 x i1> @vtrunc_nxv2i1_nxv2i16(<2 x i16> %a, <2 x i1> %m, i32 zeroext %vl) {
8-
; CHECK-LABEL: vtrunc_nxv2i1_nxv2i16:
7+
define <2 x i1> @vtrunc_v2i1_v2i16(<2 x i16> %a, <2 x i1> %m, i32 zeroext %vl) {
8+
; CHECK-LABEL: vtrunc_v2i1_v2i16:
99
; CHECK: # %bb.0:
1010
; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, mu
1111
; CHECK-NEXT: vand.vi v8, v8, 1, v0.t
1212
; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma
1313
; CHECK-NEXT: vmsne.vi v0, v8, 0, v0.t
1414
; CHECK-NEXT: ret
15-
%v = call <2 x i1> @llvm.vp.trunc.nxv2i16.nxv2i1(<2 x i16> %a, <2 x i1> %m, i32 %vl)
15+
%v = call <2 x i1> @llvm.vp.trunc.v2i1.v2i16(<2 x i16> %a, <2 x i1> %m, i32 %vl)
1616
ret <2 x i1> %v
1717
}
1818

19-
define <2 x i1> @vtrunc_nxv2i1_nxv2i16_unmasked(<2 x i16> %a, i32 zeroext %vl) {
20-
; CHECK-LABEL: vtrunc_nxv2i1_nxv2i16_unmasked:
19+
define <2 x i1> @vtrunc_v2i1_v2i16_unmasked(<2 x i16> %a, i32 zeroext %vl) {
20+
; CHECK-LABEL: vtrunc_v2i1_v2i16_unmasked:
2121
; CHECK: # %bb.0:
2222
; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
2323
; CHECK-NEXT: vand.vi v8, v8, 1
2424
; CHECK-NEXT: vmsne.vi v0, v8, 0
2525
; CHECK-NEXT: ret
26-
%v = call <2 x i1> @llvm.vp.trunc.nxv2i16.nxv2i1(<2 x i16> %a, <2 x i1> shufflevector (<2 x i1> insertelement (<2 x i1> undef, i1 true, i32 0), <2 x i1> undef, <2 x i32> zeroinitializer), i32 %vl)
26+
%v = call <2 x i1> @llvm.vp.trunc.v2i1.v2i16(<2 x i16> %a, <2 x i1> <i1 true, i1 true>, i32 %vl)
2727
ret <2 x i1> %v
2828
}
2929

30-
declare <2 x i1> @llvm.vp.trunc.nxv2i1.nxv2i32(<2 x i32>, <2 x i1>, i32)
30+
declare <2 x i1> @llvm.vp.trunc.v2i1.v2i32(<2 x i32>, <2 x i1>, i32)
3131

32-
define <2 x i1> @vtrunc_nxv2i1_nxv2i32(<2 x i32> %a, <2 x i1> %m, i32 zeroext %vl) {
33-
; CHECK-LABEL: vtrunc_nxv2i1_nxv2i32:
32+
define <2 x i1> @vtrunc_v2i1_v2i32(<2 x i32> %a, <2 x i1> %m, i32 zeroext %vl) {
33+
; CHECK-LABEL: vtrunc_v2i1_v2i32:
3434
; CHECK: # %bb.0:
3535
; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, mu
3636
; CHECK-NEXT: vand.vi v8, v8, 1, v0.t
3737
; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
3838
; CHECK-NEXT: vmsne.vi v0, v8, 0, v0.t
3939
; CHECK-NEXT: ret
40-
%v = call <2 x i1> @llvm.vp.trunc.nxv2i1.nxv2i32(<2 x i32> %a, <2 x i1> %m, i32 %vl)
40+
%v = call <2 x i1> @llvm.vp.trunc.v2i1.v2i32(<2 x i32> %a, <2 x i1> %m, i32 %vl)
4141
ret <2 x i1> %v
4242
}
4343

44-
define <2 x i1> @vtrunc_nxv2i1_nxv2i32_unmasked(<2 x i32> %a, i32 zeroext %vl) {
45-
; CHECK-LABEL: vtrunc_nxv2i1_nxv2i32_unmasked:
44+
define <2 x i1> @vtrunc_v2i1_v2i32_unmasked(<2 x i32> %a, i32 zeroext %vl) {
45+
; CHECK-LABEL: vtrunc_v2i1_v2i32_unmasked:
4646
; CHECK: # %bb.0:
4747
; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
4848
; CHECK-NEXT: vand.vi v8, v8, 1
4949
; CHECK-NEXT: vmsne.vi v0, v8, 0
5050
; CHECK-NEXT: ret
51-
%v = call <2 x i1> @llvm.vp.trunc.nxv2i1.nxv2i32(<2 x i32> %a, <2 x i1> shufflevector (<2 x i1> insertelement (<2 x i1> undef, i1 true, i32 0), <2 x i1> undef, <2 x i32> zeroinitializer), i32 %vl)
51+
%v = call <2 x i1> @llvm.vp.trunc.v2i1.v2i32(<2 x i32> %a, <2 x i1> <i1 true, i1 true>, i32 %vl)
5252
ret <2 x i1> %v
5353
}
5454

55-
declare <2 x i1> @llvm.vp.trunc.nxv2i1.nxv2i64(<2 x i64>, <2 x i1>, i32)
55+
declare <2 x i1> @llvm.vp.trunc.v2i1.v2i64(<2 x i64>, <2 x i1>, i32)
5656

57-
define <2 x i1> @vtrunc_nxv2i1_nxv2i64(<2 x i64> %a, <2 x i1> %m, i32 zeroext %vl) {
58-
; CHECK-LABEL: vtrunc_nxv2i1_nxv2i64:
57+
define <2 x i1> @vtrunc_v2i1_v2i64(<2 x i64> %a, <2 x i1> %m, i32 zeroext %vl) {
58+
; CHECK-LABEL: vtrunc_v2i1_v2i64:
5959
; CHECK: # %bb.0:
6060
; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, mu
6161
; CHECK-NEXT: vand.vi v8, v8, 1, v0.t
6262
; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, ma
6363
; CHECK-NEXT: vmsne.vi v0, v8, 0, v0.t
6464
; CHECK-NEXT: ret
65-
%v = call <2 x i1> @llvm.vp.trunc.nxv2i1.nxv2i64(<2 x i64> %a, <2 x i1> %m, i32 %vl)
65+
%v = call <2 x i1> @llvm.vp.trunc.v2i1.v2i64(<2 x i64> %a, <2 x i1> %m, i32 %vl)
6666
ret <2 x i1> %v
6767
}
6868

69-
define <2 x i1> @vtrunc_nxv2i1_nxv2i64_unmasked(<2 x i64> %a, i32 zeroext %vl) {
70-
; CHECK-LABEL: vtrunc_nxv2i1_nxv2i64_unmasked:
69+
define <2 x i1> @vtrunc_v2i1_v2i64_unmasked(<2 x i64> %a, i32 zeroext %vl) {
70+
; CHECK-LABEL: vtrunc_v2i1_v2i64_unmasked:
7171
; CHECK: # %bb.0:
7272
; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma
7373
; CHECK-NEXT: vand.vi v8, v8, 1
7474
; CHECK-NEXT: vmsne.vi v0, v8, 0
7575
; CHECK-NEXT: ret
76-
%v = call <2 x i1> @llvm.vp.trunc.nxv2i1.nxv2i64(<2 x i64> %a, <2 x i1> shufflevector (<2 x i1> insertelement (<2 x i1> undef, i1 true, i32 0), <2 x i1> undef, <2 x i32> zeroinitializer), i32 %vl)
76+
%v = call <2 x i1> @llvm.vp.trunc.v2i1.v2i64(<2 x i64> %a, <2 x i1> <i1 true, i1 true>, i32 %vl)
7777
ret <2 x i1> %v
7878
}

‎llvm/test/CodeGen/RISCV/rvv/fixed-vector-trunc-vp.ll

Lines changed: 66 additions & 66 deletions
Original file line numberDiff line numberDiff line change
@@ -2,56 +2,56 @@
22
; RUN: llc -mtriple=riscv32 -mattr=+v,+m -riscv-v-vector-bits-min=128 -verify-machineinstrs < %s | FileCheck %s
33
; RUN: llc -mtriple=riscv64 -mattr=+v,+m -riscv-v-vector-bits-min=128 -verify-machineinstrs < %s | FileCheck %s
44

5-
declare <2 x i7> @llvm.vp.trunc.nxv2i7.nxv2i16(<2 x i16>, <2 x i1>, i32)
5+
declare <2 x i7> @llvm.vp.trunc.v2i7.v2i16(<2 x i16>, <2 x i1>, i32)
66

7-
define <2 x i7> @vtrunc_nxv2i7_nxv2i16(<2 x i16> %a, <2 x i1> %m, i32 zeroext %vl) {
8-
; CHECK-LABEL: vtrunc_nxv2i7_nxv2i16:
7+
define <2 x i7> @vtrunc_v2i7_v2i16(<2 x i16> %a, <2 x i1> %m, i32 zeroext %vl) {
8+
; CHECK-LABEL: vtrunc_v2i7_v2i16:
99
; CHECK: # %bb.0:
1010
; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
1111
; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t
1212
; CHECK-NEXT: ret
13-
%v = call <2 x i7> @llvm.vp.trunc.nxv2i7.nxv2i16(<2 x i16> %a, <2 x i1> %m, i32 %vl)
13+
%v = call <2 x i7> @llvm.vp.trunc.v2i7.v2i16(<2 x i16> %a, <2 x i1> %m, i32 %vl)
1414
ret <2 x i7> %v
1515
}
1616

17-
declare <2 x i8> @llvm.vp.trunc.nxv2i8.nxv2i15(<2 x i15>, <2 x i1>, i32)
17+
declare <2 x i8> @llvm.vp.trunc.v2i8.v2i15(<2 x i15>, <2 x i1>, i32)
1818

19-
define <2 x i8> @vtrunc_nxv2i8_nxv2i15(<2 x i15> %a, <2 x i1> %m, i32 zeroext %vl) {
20-
; CHECK-LABEL: vtrunc_nxv2i8_nxv2i15:
19+
define <2 x i8> @vtrunc_v2i8_v2i15(<2 x i15> %a, <2 x i1> %m, i32 zeroext %vl) {
20+
; CHECK-LABEL: vtrunc_v2i8_v2i15:
2121
; CHECK: # %bb.0:
2222
; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
2323
; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t
2424
; CHECK-NEXT: ret
25-
%v = call <2 x i8> @llvm.vp.trunc.nxv2i8.nxv2i15(<2 x i15> %a, <2 x i1> %m, i32 %vl)
25+
%v = call <2 x i8> @llvm.vp.trunc.v2i8.v2i15(<2 x i15> %a, <2 x i1> %m, i32 %vl)
2626
ret <2 x i8> %v
2727
}
2828

29-
declare <2 x i8> @llvm.vp.trunc.nxv2i8.nxv2i16(<2 x i16>, <2 x i1>, i32)
29+
declare <2 x i8> @llvm.vp.trunc.v2i8.v2i16(<2 x i16>, <2 x i1>, i32)
3030

31-
define <2 x i8> @vtrunc_nxv2i8_nxv2i16(<2 x i16> %a, <2 x i1> %m, i32 zeroext %vl) {
32-
; CHECK-LABEL: vtrunc_nxv2i8_nxv2i16:
31+
define <2 x i8> @vtrunc_v2i8_v2i16(<2 x i16> %a, <2 x i1> %m, i32 zeroext %vl) {
32+
; CHECK-LABEL: vtrunc_v2i8_v2i16:
3333
; CHECK: # %bb.0:
3434
; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
3535
; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t
3636
; CHECK-NEXT: ret
37-
%v = call <2 x i8> @llvm.vp.trunc.nxv2i8.nxv2i16(<2 x i16> %a, <2 x i1> %m, i32 %vl)
37+
%v = call <2 x i8> @llvm.vp.trunc.v2i8.v2i16(<2 x i16> %a, <2 x i1> %m, i32 %vl)
3838
ret <2 x i8> %v
3939
}
4040

41-
define <2 x i8> @vtrunc_nxv2i8_nxv2i16_unmasked(<2 x i16> %a, i32 zeroext %vl) {
42-
; CHECK-LABEL: vtrunc_nxv2i8_nxv2i16_unmasked:
41+
define <2 x i8> @vtrunc_v2i8_v2i16_unmasked(<2 x i16> %a, i32 zeroext %vl) {
42+
; CHECK-LABEL: vtrunc_v2i8_v2i16_unmasked:
4343
; CHECK: # %bb.0:
4444
; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma
4545
; CHECK-NEXT: vnsrl.wi v8, v8, 0
4646
; CHECK-NEXT: ret
47-
%v = call <2 x i8> @llvm.vp.trunc.nxv2i8.nxv2i16(<2 x i16> %a, <2 x i1> shufflevector (<2 x i1> insertelement (<2 x i1> undef, i1 true, i32 0), <2 x i1> undef, <2 x i32> zeroinitializer), i32 %vl)
47+
%v = call <2 x i8> @llvm.vp.trunc.v2i8.v2i16(<2 x i16> %a, <2 x i1> <i1 true, i1 true>, i32 %vl)
4848
ret <2 x i8> %v
4949
}
5050

51-
declare <128 x i7> @llvm.vp.trunc.nxv128i7.nxv128i16(<128 x i16>, <128 x i1>, i32)
51+
declare <128 x i7> @llvm.vp.trunc.v128i7.v128i16(<128 x i16>, <128 x i1>, i32)
5252

53-
define <128 x i7> @vtrunc_nxv128i7_nxv128i16(<128 x i16> %a, <128 x i1> %m, i32 zeroext %vl) {
54-
; CHECK-LABEL: vtrunc_nxv128i7_nxv128i16:
53+
define <128 x i7> @vtrunc_v128i7_v128i16(<128 x i16> %a, <128 x i1> %m, i32 zeroext %vl) {
54+
; CHECK-LABEL: vtrunc_v128i7_v128i16:
5555
; CHECK: # %bb.0:
5656
; CHECK-NEXT: addi sp, sp, -16
5757
; CHECK-NEXT: .cfi_def_cfa_offset 16
@@ -90,40 +90,40 @@ define <128 x i7> @vtrunc_nxv128i7_nxv128i16(<128 x i16> %a, <128 x i1> %m, i32
9090
; CHECK-NEXT: add sp, sp, a0
9191
; CHECK-NEXT: addi sp, sp, 16
9292
; CHECK-NEXT: ret
93-
%v = call <128 x i7> @llvm.vp.trunc.nxv128i7.nxv128i16(<128 x i16> %a, <128 x i1> %m, i32 %vl)
93+
%v = call <128 x i7> @llvm.vp.trunc.v128i7.v128i16(<128 x i16> %a, <128 x i1> %m, i32 %vl)
9494
ret <128 x i7> %v
9595
}
9696

97-
declare <2 x i8> @llvm.vp.trunc.nxv2i8.nxv2i32(<2 x i32>, <2 x i1>, i32)
97+
declare <2 x i8> @llvm.vp.trunc.v2i8.v2i32(<2 x i32>, <2 x i1>, i32)
9898

99-
define <2 x i8> @vtrunc_nxv2i8_nxv2i32(<2 x i32> %a, <2 x i1> %m, i32 zeroext %vl) {
100-
; CHECK-LABEL: vtrunc_nxv2i8_nxv2i32:
99+
define <2 x i8> @vtrunc_v2i8_v2i32(<2 x i32> %a, <2 x i1> %m, i32 zeroext %vl) {
100+
; CHECK-LABEL: vtrunc_v2i8_v2i32:
101101
; CHECK: # %bb.0:
102102
; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, mu
103103
; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t
104104
; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu
105105
; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t
106106
; CHECK-NEXT: ret
107-
%v = call <2 x i8> @llvm.vp.trunc.nxv2i8.nxv2i32(<2 x i32> %a, <2 x i1> %m, i32 %vl)
107+
%v = call <2 x i8> @llvm.vp.trunc.v2i8.v2i32(<2 x i32> %a, <2 x i1> %m, i32 %vl)
108108
ret <2 x i8> %v
109109
}
110110

111-
define <2 x i8> @vtrunc_nxv2i8_nxv2i32_unmasked(<2 x i32> %a, i32 zeroext %vl) {
112-
; CHECK-LABEL: vtrunc_nxv2i8_nxv2i32_unmasked:
111+
define <2 x i8> @vtrunc_v2i8_v2i32_unmasked(<2 x i32> %a, i32 zeroext %vl) {
112+
; CHECK-LABEL: vtrunc_v2i8_v2i32_unmasked:
113113
; CHECK: # %bb.0:
114114
; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
115115
; CHECK-NEXT: vnsrl.wi v8, v8, 0
116116
; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, ma
117117
; CHECK-NEXT: vnsrl.wi v8, v8, 0
118118
; CHECK-NEXT: ret
119-
%v = call <2 x i8> @llvm.vp.trunc.nxv2i8.nxv2i32(<2 x i32> %a, <2 x i1> shufflevector (<2 x i1> insertelement (<2 x i1> undef, i1 true, i32 0), <2 x i1> undef, <2 x i32> zeroinitializer), i32 %vl)
119+
%v = call <2 x i8> @llvm.vp.trunc.v2i8.v2i32(<2 x i32> %a, <2 x i1> <i1 true, i1 true>, i32 %vl)
120120
ret <2 x i8> %v
121121
}
122122

123-
declare <2 x i8> @llvm.vp.trunc.nxv2i8.nxv2i64(<2 x i64>, <2 x i1>, i32)
123+
declare <2 x i8> @llvm.vp.trunc.v2i8.v2i64(<2 x i64>, <2 x i1>, i32)
124124

125-
define <2 x i8> @vtrunc_nxv2i8_nxv2i64(<2 x i64> %a, <2 x i1> %m, i32 zeroext %vl) {
126-
; CHECK-LABEL: vtrunc_nxv2i8_nxv2i64:
125+
define <2 x i8> @vtrunc_v2i8_v2i64(<2 x i64> %a, <2 x i1> %m, i32 zeroext %vl) {
126+
; CHECK-LABEL: vtrunc_v2i8_v2i64:
127127
; CHECK: # %bb.0:
128128
; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, mu
129129
; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t
@@ -132,12 +132,12 @@ define <2 x i8> @vtrunc_nxv2i8_nxv2i64(<2 x i64> %a, <2 x i1> %m, i32 zeroext %v
132132
; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu
133133
; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t
134134
; CHECK-NEXT: ret
135-
%v = call <2 x i8> @llvm.vp.trunc.nxv2i8.nxv2i64(<2 x i64> %a, <2 x i1> %m, i32 %vl)
135+
%v = call <2 x i8> @llvm.vp.trunc.v2i8.v2i64(<2 x i64> %a, <2 x i1> %m, i32 %vl)
136136
ret <2 x i8> %v
137137
}
138138

139-
define <2 x i8> @vtrunc_nxv2i8_nxv2i64_unmasked(<2 x i64> %a, i32 zeroext %vl) {
140-
; CHECK-LABEL: vtrunc_nxv2i8_nxv2i64_unmasked:
139+
define <2 x i8> @vtrunc_v2i8_v2i64_unmasked(<2 x i64> %a, i32 zeroext %vl) {
140+
; CHECK-LABEL: vtrunc_v2i8_v2i64_unmasked:
141141
; CHECK: # %bb.0:
142142
; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
143143
; CHECK-NEXT: vnsrl.wi v8, v8, 0
@@ -146,98 +146,98 @@ define <2 x i8> @vtrunc_nxv2i8_nxv2i64_unmasked(<2 x i64> %a, i32 zeroext %vl) {
146146
; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, ma
147147
; CHECK-NEXT: vnsrl.wi v8, v8, 0
148148
; CHECK-NEXT: ret
149-
%v = call <2 x i8> @llvm.vp.trunc.nxv2i8.nxv2i64(<2 x i64> %a, <2 x i1> shufflevector (<2 x i1> insertelement (<2 x i1> undef, i1 true, i32 0), <2 x i1> undef, <2 x i32> zeroinitializer), i32 %vl)
149+
%v = call <2 x i8> @llvm.vp.trunc.v2i8.v2i64(<2 x i64> %a, <2 x i1> <i1 true, i1 true>, i32 %vl)
150150
ret <2 x i8> %v
151151
}
152152

153-
declare <2 x i16> @llvm.vp.trunc.nxv2i16.nxv2i32(<2 x i32>, <2 x i1>, i32)
153+
declare <2 x i16> @llvm.vp.trunc.v2i16.v2i32(<2 x i32>, <2 x i1>, i32)
154154

155-
define <2 x i16> @vtrunc_nxv2i16_nxv2i32(<2 x i32> %a, <2 x i1> %m, i32 zeroext %vl) {
156-
; CHECK-LABEL: vtrunc_nxv2i16_nxv2i32:
155+
define <2 x i16> @vtrunc_v2i16_v2i32(<2 x i32> %a, <2 x i1> %m, i32 zeroext %vl) {
156+
; CHECK-LABEL: vtrunc_v2i16_v2i32:
157157
; CHECK: # %bb.0:
158158
; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, mu
159159
; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t
160160
; CHECK-NEXT: ret
161-
%v = call <2 x i16> @llvm.vp.trunc.nxv2i16.nxv2i32(<2 x i32> %a, <2 x i1> %m, i32 %vl)
161+
%v = call <2 x i16> @llvm.vp.trunc.v2i16.v2i32(<2 x i32> %a, <2 x i1> %m, i32 %vl)
162162
ret <2 x i16> %v
163163
}
164164

165-
define <2 x i16> @vtrunc_nxv2i16_nxv2i32_unmasked(<2 x i32> %a, i32 zeroext %vl) {
166-
; CHECK-LABEL: vtrunc_nxv2i16_nxv2i32_unmasked:
165+
define <2 x i16> @vtrunc_v2i16_v2i32_unmasked(<2 x i32> %a, i32 zeroext %vl) {
166+
; CHECK-LABEL: vtrunc_v2i16_v2i32_unmasked:
167167
; CHECK: # %bb.0:
168168
; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
169169
; CHECK-NEXT: vnsrl.wi v8, v8, 0
170170
; CHECK-NEXT: ret
171-
%v = call <2 x i16> @llvm.vp.trunc.nxv2i16.nxv2i32(<2 x i32> %a, <2 x i1> shufflevector (<2 x i1> insertelement (<2 x i1> undef, i1 true, i32 0), <2 x i1> undef, <2 x i32> zeroinitializer), i32 %vl)
171+
%v = call <2 x i16> @llvm.vp.trunc.v2i16.v2i32(<2 x i32> %a, <2 x i1> <i1 true, i1 true>, i32 %vl)
172172
ret <2 x i16> %v
173173
}
174174

175-
declare <2 x i16> @llvm.vp.trunc.nxv2i16.nxv2i64(<2 x i64>, <2 x i1>, i32)
175+
declare <2 x i16> @llvm.vp.trunc.v2i16.v2i64(<2 x i64>, <2 x i1>, i32)
176176

177-
define <2 x i16> @vtrunc_nxv2i16_nxv2i64(<2 x i64> %a, <2 x i1> %m, i32 zeroext %vl) {
178-
; CHECK-LABEL: vtrunc_nxv2i16_nxv2i64:
177+
define <2 x i16> @vtrunc_v2i16_v2i64(<2 x i64> %a, <2 x i1> %m, i32 zeroext %vl) {
178+
; CHECK-LABEL: vtrunc_v2i16_v2i64:
179179
; CHECK: # %bb.0:
180180
; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, mu
181181
; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t
182182
; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
183183
; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t
184184
; CHECK-NEXT: ret
185-
%v = call <2 x i16> @llvm.vp.trunc.nxv2i16.nxv2i64(<2 x i64> %a, <2 x i1> %m, i32 %vl)
185+
%v = call <2 x i16> @llvm.vp.trunc.v2i16.v2i64(<2 x i64> %a, <2 x i1> %m, i32 %vl)
186186
ret <2 x i16> %v
187187
}
188188

189-
define <2 x i16> @vtrunc_nxv2i16_nxv2i64_unmasked(<2 x i64> %a, i32 zeroext %vl) {
190-
; CHECK-LABEL: vtrunc_nxv2i16_nxv2i64_unmasked:
189+
define <2 x i16> @vtrunc_v2i16_v2i64_unmasked(<2 x i64> %a, i32 zeroext %vl) {
190+
; CHECK-LABEL: vtrunc_v2i16_v2i64_unmasked:
191191
; CHECK: # %bb.0:
192192
; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
193193
; CHECK-NEXT: vnsrl.wi v8, v8, 0
194194
; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma
195195
; CHECK-NEXT: vnsrl.wi v8, v8, 0
196196
; CHECK-NEXT: ret
197-
%v = call <2 x i16> @llvm.vp.trunc.nxv2i16.nxv2i64(<2 x i64> %a, <2 x i1> shufflevector (<2 x i1> insertelement (<2 x i1> undef, i1 true, i32 0), <2 x i1> undef, <2 x i32> zeroinitializer), i32 %vl)
197+
%v = call <2 x i16> @llvm.vp.trunc.v2i16.v2i64(<2 x i64> %a, <2 x i1> <i1 true, i1 true>, i32 %vl)
198198
ret <2 x i16> %v
199199
}
200200

201-
declare <15 x i16> @llvm.vp.trunc.nxv15i16.nxv15i64(<15 x i64>, <15 x i1>, i32)
201+
declare <15 x i16> @llvm.vp.trunc.v15i16.v15i64(<15 x i64>, <15 x i1>, i32)
202202

203-
define <15 x i16> @vtrunc_nxv15i16_nxv15i64(<15 x i64> %a, <15 x i1> %m, i32 zeroext %vl) {
204-
; CHECK-LABEL: vtrunc_nxv15i16_nxv15i64:
203+
define <15 x i16> @vtrunc_v15i16_v15i64(<15 x i64> %a, <15 x i1> %m, i32 zeroext %vl) {
204+
; CHECK-LABEL: vtrunc_v15i16_v15i64:
205205
; CHECK: # %bb.0:
206206
; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, mu
207207
; CHECK-NEXT: vnsrl.wi v16, v8, 0, v0.t
208208
; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, mu
209209
; CHECK-NEXT: vnsrl.wi v8, v16, 0, v0.t
210210
; CHECK-NEXT: ret
211-
%v = call <15 x i16> @llvm.vp.trunc.nxv15i16.nxv15i64(<15 x i64> %a, <15 x i1> %m, i32 %vl)
211+
%v = call <15 x i16> @llvm.vp.trunc.v15i16.v15i64(<15 x i64> %a, <15 x i1> %m, i32 %vl)
212212
ret <15 x i16> %v
213213
}
214214

215-
declare <2 x i32> @llvm.vp.trunc.nxv2i64.nxv2i32(<2 x i64>, <2 x i1>, i32)
215+
declare <2 x i32> @llvm.vp.trunc.v2i32.v2i64(<2 x i64>, <2 x i1>, i32)
216216

217-
define <2 x i32> @vtrunc_nxv2i32_nxv2i64(<2 x i64> %a, <2 x i1> %m, i32 zeroext %vl) {
218-
; CHECK-LABEL: vtrunc_nxv2i32_nxv2i64:
217+
define <2 x i32> @vtrunc_v2i32_v2i64(<2 x i64> %a, <2 x i1> %m, i32 zeroext %vl) {
218+
; CHECK-LABEL: vtrunc_v2i32_v2i64:
219219
; CHECK: # %bb.0:
220220
; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, mu
221221
; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t
222222
; CHECK-NEXT: ret
223-
%v = call <2 x i32> @llvm.vp.trunc.nxv2i64.nxv2i32(<2 x i64> %a, <2 x i1> %m, i32 %vl)
223+
%v = call <2 x i32> @llvm.vp.trunc.v2i32.v2i64(<2 x i64> %a, <2 x i1> %m, i32 %vl)
224224
ret <2 x i32> %v
225225
}
226226

227-
define <2 x i32> @vtrunc_nxv2i32_nxv2i64_unmasked(<2 x i64> %a, i32 zeroext %vl) {
228-
; CHECK-LABEL: vtrunc_nxv2i32_nxv2i64_unmasked:
227+
define <2 x i32> @vtrunc_v2i32_v2i64_unmasked(<2 x i64> %a, i32 zeroext %vl) {
228+
; CHECK-LABEL: vtrunc_v2i32_v2i64_unmasked:
229229
; CHECK: # %bb.0:
230230
; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
231231
; CHECK-NEXT: vnsrl.wi v8, v8, 0
232232
; CHECK-NEXT: ret
233-
%v = call <2 x i32> @llvm.vp.trunc.nxv2i64.nxv2i32(<2 x i64> %a, <2 x i1> shufflevector (<2 x i1> insertelement (<2 x i1> undef, i1 true, i32 0), <2 x i1> undef, <2 x i32> zeroinitializer), i32 %vl)
233+
%v = call <2 x i32> @llvm.vp.trunc.v2i32.v2i64(<2 x i64> %a, <2 x i1> <i1 true, i1 true>, i32 %vl)
234234
ret <2 x i32> %v
235235
}
236236

237-
declare <128 x i32> @llvm.vp.trunc.nxv128i64.nxv128i32(<128 x i64>, <128 x i1>, i32)
237+
declare <128 x i32> @llvm.vp.trunc.v128i32.v128i64(<128 x i64>, <128 x i1>, i32)
238238

239-
define <128 x i32> @vtrunc_nxv128i32_nxv128i64(<128 x i64> %a, <128 x i1> %m, i32 zeroext %vl) {
240-
; CHECK-LABEL: vtrunc_nxv128i32_nxv128i64:
239+
define <128 x i32> @vtrunc_v128i32_v128i64(<128 x i64> %a, <128 x i1> %m, i32 zeroext %vl) {
240+
; CHECK-LABEL: vtrunc_v128i32_v128i64:
241241
; CHECK: # %bb.0:
242242
; CHECK-NEXT: addi sp, sp, -16
243243
; CHECK-NEXT: .cfi_def_cfa_offset 16
@@ -490,14 +490,14 @@ define <128 x i32> @vtrunc_nxv128i32_nxv128i64(<128 x i64> %a, <128 x i1> %m, i3
490490
; CHECK-NEXT: add sp, sp, a0
491491
; CHECK-NEXT: addi sp, sp, 16
492492
; CHECK-NEXT: ret
493-
%v = call <128 x i32> @llvm.vp.trunc.nxv128i64.nxv128i32(<128 x i64> %a, <128 x i1> %m, i32 %vl)
493+
%v = call <128 x i32> @llvm.vp.trunc.v128i32.v128i64(<128 x i64> %a, <128 x i1> %m, i32 %vl)
494494
ret <128 x i32> %v
495495
}
496496

497-
declare <32 x i32> @llvm.vp.trunc.nxv32i64.nxv32i32(<32 x i64>, <32 x i1>, i32)
497+
declare <32 x i32> @llvm.vp.trunc.v32i32.v32i64(<32 x i64>, <32 x i1>, i32)
498498

499-
define <32 x i32> @vtrunc_nxv32i32_nxv32i64(<32 x i64> %a, <32 x i1> %m, i32 zeroext %vl) {
500-
; CHECK-LABEL: vtrunc_nxv32i32_nxv32i64:
499+
define <32 x i32> @vtrunc_v32i32_v32i64(<32 x i64> %a, <32 x i1> %m, i32 zeroext %vl) {
500+
; CHECK-LABEL: vtrunc_v32i32_v32i64:
501501
; CHECK: # %bb.0:
502502
; CHECK-NEXT: addi sp, sp, -16
503503
; CHECK-NEXT: .cfi_def_cfa_offset 16
@@ -536,6 +536,6 @@ define <32 x i32> @vtrunc_nxv32i32_nxv32i64(<32 x i64> %a, <32 x i1> %m, i32 zer
536536
; CHECK-NEXT: add sp, sp, a0
537537
; CHECK-NEXT: addi sp, sp, 16
538538
; CHECK-NEXT: ret
539-
%v = call <32 x i32> @llvm.vp.trunc.nxv32i64.nxv32i32(<32 x i64> %a, <32 x i1> %m, i32 %vl)
539+
%v = call <32 x i32> @llvm.vp.trunc.v32i32.v32i64(<32 x i64> %a, <32 x i1> %m, i32 %vl)
540540
ret <32 x i32> %v
541541
}

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