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!fixup retain poison cost as 0
1 parent ef47349 commit 3dc8894

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6 files changed

+60
-72
lines changed

6 files changed

+60
-72
lines changed

‎llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3897,6 +3897,8 @@ InstructionCost AArch64TTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
38973897
unsigned Index,
38983898
const Value *Op0,
38993899
const Value *Op1) const {
3900+
if (Index == 0 && Op0 && isa<PoisonValue>(Op0))
3901+
return 0;
39003902
return getVectorInstrCostHelper(Opcode, Val, CostKind, Index);
39013903
}
39023904

‎llvm/test/Transforms/SLPVectorizer/AArch64/extract-subvector-long-input.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ define void @test() {
88
; CHECK: bb1:
99
; CHECK-NEXT: [[PHI7:%.*]] = phi i32 [ 0, [[BB10:%.*]] ], [ 0, [[BB:%.*]] ]
1010
; CHECK-NEXT: [[TMP0:%.*]] = phi <8 x i32> [ poison, [[BB10]] ], [ zeroinitializer, [[BB]] ]
11-
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> <i32 undef, i32 poison>, i32 [[PHI7]], i32 1
11+
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> <i32 poison, i32 undef>, i32 [[PHI7]], i32 0
1212
; CHECK-NEXT: switch i32 0, label [[BB16:%.*]] [
1313
; CHECK-NEXT: i32 0, label [[BB14:%.*]]
1414
; CHECK-NEXT: i32 1, label [[BB11:%.*]]

‎llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll‎

Lines changed: 11 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -46,9 +46,9 @@ define i32 @getelementptr_4x32(ptr nocapture readonly %g, i32 %n, i32 %x, i32 %y
4646
; CHECK-NEXT: [[CMP31:%.*]] = icmp sgt i32 [[N:%.*]], 0
4747
; CHECK-NEXT: br i1 [[CMP31]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]
4848
; CHECK: for.body.preheader:
49-
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> <i32 0, i32 poison>, i32 [[X:%.*]], i32 1
50-
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[Y:%.*]], i32 0
51-
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[Z:%.*]], i32 1
49+
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> <i32 0, i32 poison>, i32 [[X:%.*]], i64 1
50+
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[Y:%.*]], i64 0
51+
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[Z:%.*]], i64 1
5252
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
5353
; CHECK: for.cond.cleanup.loopexit:
5454
; CHECK-NEXT: [[ADD16:%.*]] = extractelement <2 x i32> [[TMP21:%.*]], i64 0
@@ -75,12 +75,14 @@ define i32 @getelementptr_4x32(ptr nocapture readonly %g, i32 %n, i32 %x, i32 %y
7575
; CHECK-NEXT: [[T8:%.*]] = load i32, ptr [[ARRAYIDX5]], align 4
7676
; CHECK-NEXT: [[ADD6:%.*]] = add nsw i32 [[ADD1]], [[T8]]
7777
; CHECK-NEXT: [[TMP10:%.*]] = add nsw <2 x i32> [[TMP4]], [[TMP2]]
78-
; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x i32> [[TMP10]], i32 0
79-
; CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, ptr [[G]], i32 [[TMP9]]
78+
; CHECK-NEXT: [[TMP22:%.*]] = extractelement <2 x i32> [[TMP10]], i64 0
79+
; CHECK-NEXT: [[TMP23:%.*]] = sext i32 [[TMP22]] to i64
80+
; CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, ptr [[G]], i64 [[TMP23]]
8081
; CHECK-NEXT: [[T10:%.*]] = load i32, ptr [[ARRAYIDX10]], align 4
8182
; CHECK-NEXT: [[ADD11:%.*]] = add nsw i32 [[ADD6]], [[T10]]
82-
; CHECK-NEXT: [[TMP11:%.*]] = extractelement <2 x i32> [[TMP10]], i32 1
83-
; CHECK-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds i32, ptr [[G]], i32 [[TMP11]]
83+
; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x i32> [[TMP10]], i64 1
84+
; CHECK-NEXT: [[TMP18:%.*]] = sext i32 [[TMP24]] to i64
85+
; CHECK-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds i32, ptr [[G]], i64 [[TMP18]]
8486
; CHECK-NEXT: [[T12:%.*]] = load i32, ptr [[ARRAYIDX15]], align 4
8587
; CHECK-NEXT: [[TMP19:%.*]] = insertelement <2 x i32> <i32 poison, i32 1>, i32 [[ADD11]], i64 0
8688
; CHECK-NEXT: [[TMP20:%.*]] = insertelement <2 x i32> [[TMP7]], i32 [[T12]], i64 0
@@ -145,6 +147,8 @@ define i32 @getelementptr_2x32(ptr nocapture readonly %g, i32 %n, i32 %x, i32 %y
145147
; CHECK-NEXT: [[CMP31:%.*]] = icmp sgt i32 [[N:%.*]], 0
146148
; CHECK-NEXT: br i1 [[CMP31]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]
147149
; CHECK: for.body.preheader:
150+
; CHECK-NEXT: [[TMP10:%.*]] = insertelement <2 x i32> poison, i32 [[Y:%.*]], i64 0
151+
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> [[TMP10]], i32 [[Z:%.*]], i64 1
148152
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
149153
; CHECK: for.cond.cleanup.loopexit:
150154
; CHECK-NEXT: [[OP_RDX:%.*]] = extractelement <2 x i32> [[TMP18:%.*]], i64 0

‎llvm/test/Transforms/SLPVectorizer/AArch64/phi-node-bitwidt-op-not.ll‎

Lines changed: 24 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -7,49 +7,37 @@ define i32 @test(ptr %b, ptr %c, i32 %0, ptr %a, i1 %tobool3.not) {
77
; CHECK-NEXT: entry:
88
; CHECK-NEXT: br i1 [[TOBOOL3_NOT]], label [[BB1:%.*]], label [[BB2:%.*]]
99
; CHECK: bb1:
10-
; CHECK-NEXT: [[CONV1_I_US:%.*]] = ashr i32 [[TMP0]], 16
11-
; CHECK-NEXT: [[CMP2_I_US:%.*]] = icmp slt i32 [[CONV1_I_US]], [[TMP0]]
12-
; CHECK-NEXT: [[SEXT26_US:%.*]] = zext i1 [[CMP2_I_US]] to i32
13-
; CHECK-NEXT: [[CONV1_I_US_5:%.*]] = ashr i32 [[TMP0]], 16
14-
; CHECK-NEXT: [[CMP2_I_US_5:%.*]] = icmp slt i32 [[CONV1_I_US_5]], [[TMP0]]
15-
; CHECK-NEXT: [[SEXT26_US_5:%.*]] = zext i1 [[CMP2_I_US_5]] to i32
16-
; CHECK-NEXT: [[CONV1_I_US_6:%.*]] = ashr i32 [[TMP0]], 16
17-
; CHECK-NEXT: [[CMP2_I_US_6:%.*]] = icmp slt i32 [[CONV1_I_US_6]], [[TMP0]]
18-
; CHECK-NEXT: [[SEXT26_US_6:%.*]] = zext i1 [[CMP2_I_US_6]] to i32
19-
; CHECK-NEXT: [[CONV1_I_US_7:%.*]] = ashr i32 [[TMP0]], 16
20-
; CHECK-NEXT: [[CMP2_I_US_7:%.*]] = icmp slt i32 [[CONV1_I_US_7]], [[TMP0]]
21-
; CHECK-NEXT: [[SEXT26_US_7:%.*]] = zext i1 [[CMP2_I_US_7]] to i32
10+
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> poison, i32 [[TMP0]], i32 0
11+
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> poison, <4 x i32> zeroinitializer
12+
; CHECK-NEXT: [[TMP3:%.*]] = ashr <4 x i32> [[TMP2]], splat (i32 16)
13+
; CHECK-NEXT: [[TMP4:%.*]] = icmp slt <4 x i32> [[TMP3]], [[TMP2]]
14+
; CHECK-NEXT: [[TMP5:%.*]] = zext <4 x i1> [[TMP4]] to <4 x i16>
2215
; CHECK-NEXT: br label [[BB3:%.*]]
2316
; CHECK: bb2:
24-
; CHECK-NEXT: [[CMP2_I:%.*]] = icmp sgt i32 [[TMP0]], 0
25-
; CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[CMP2_I]] to i32
26-
; CHECK-NEXT: [[COND_I:%.*]] = select i1 [[TOBOOL3_NOT]], i32 [[TMP0]], i32 [[TMP1]]
27-
; CHECK-NEXT: [[SEXT26:%.*]] = shl i32 [[COND_I]], 16
28-
; CHECK-NEXT: [[CONV13:%.*]] = ashr i32 [[SEXT26]], 16
29-
; CHECK-NEXT: [[CMP2_I_5:%.*]] = icmp sgt i32 [[TMP0]], 0
30-
; CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[CMP2_I_5]] to i32
31-
; CHECK-NEXT: [[COND_I_5:%.*]] = select i1 [[TOBOOL3_NOT]], i32 [[TMP0]], i32 [[TMP2]]
32-
; CHECK-NEXT: [[SEXT26_5:%.*]] = shl i32 [[COND_I_5]], 16
33-
; CHECK-NEXT: [[CONV13_5:%.*]] = ashr i32 [[SEXT26_5]], 16
34-
; CHECK-NEXT: [[CMP2_I_6:%.*]] = icmp sgt i32 [[TMP0]], 0
35-
; CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[CMP2_I_6]] to i32
36-
; CHECK-NEXT: [[COND_I_6:%.*]] = select i1 [[TOBOOL3_NOT]], i32 [[TMP0]], i32 [[TMP3]]
37-
; CHECK-NEXT: [[SEXT26_6:%.*]] = shl i32 [[COND_I_6]], 16
38-
; CHECK-NEXT: [[CONV13_6:%.*]] = ashr i32 [[SEXT26_6]], 16
39-
; CHECK-NEXT: [[CMP2_I_7:%.*]] = icmp sgt i32 [[TMP0]], 0
40-
; CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[CMP2_I_7]] to i32
41-
; CHECK-NEXT: [[COND_I_7:%.*]] = select i1 [[TOBOOL3_NOT]], i32 [[TMP0]], i32 [[TMP4]]
42-
; CHECK-NEXT: [[SEXT26_7:%.*]] = shl i32 [[COND_I_7]], 16
43-
; CHECK-NEXT: [[CONV13_7:%.*]] = ashr i32 [[SEXT26_7]], 16
17+
; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> poison, i32 [[TMP0]], i32 0
18+
; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <4 x i32> [[TMP6]], <4 x i32> poison, <4 x i32> zeroinitializer
19+
; CHECK-NEXT: [[TMP8:%.*]] = icmp sgt <4 x i32> [[TMP7]], zeroinitializer
20+
; CHECK-NEXT: [[TMP9:%.*]] = zext <4 x i1> [[TMP8]] to <4 x i32>
21+
; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i1> poison, i1 [[TOBOOL3_NOT]], i32 0
22+
; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <4 x i1> [[TMP10]], <4 x i1> poison, <4 x i32> zeroinitializer
23+
; CHECK-NEXT: [[TMP12:%.*]] = select <4 x i1> [[TMP11]], <4 x i32> [[TMP7]], <4 x i32> [[TMP9]]
24+
; CHECK-NEXT: [[TMP13:%.*]] = shl <4 x i32> [[TMP12]], splat (i32 16)
25+
; CHECK-NEXT: [[TMP14:%.*]] = ashr <4 x i32> [[TMP13]], splat (i32 16)
26+
; CHECK-NEXT: [[TMP15:%.*]] = trunc <4 x i32> [[TMP14]] to <4 x i16>
4427
; CHECK-NEXT: br i1 true, label [[BB3]], label [[BB2]]
4528
; CHECK: bb3:
46-
; CHECK-NEXT: [[TMP18:%.*]] = phi i32 [ [[SEXT26_US]], [[BB1]] ], [ [[CONV13]], [[BB2]] ]
47-
; CHECK-NEXT: [[TMP20:%.*]] = phi i32 [ [[SEXT26_US_5]], [[BB1]] ], [ [[CONV13_5]], [[BB2]] ]
48-
; CHECK-NEXT: [[TMP22:%.*]] = phi i32 [ [[SEXT26_US_6]], [[BB1]] ], [ [[CONV13_6]], [[BB2]] ]
49-
; CHECK-NEXT: [[TMP24:%.*]] = phi i32 [ [[SEXT26_US_7]], [[BB1]] ], [ [[CONV13_7]], [[BB2]] ]
29+
; CHECK-NEXT: [[TMP16:%.*]] = phi <4 x i16> [ [[TMP5]], [[BB1]] ], [ [[TMP15]], [[BB2]] ]
30+
; CHECK-NEXT: [[TMP17:%.*]] = extractelement <4 x i16> [[TMP16]], i32 0
31+
; CHECK-NEXT: [[TMP18:%.*]] = sext i16 [[TMP17]] to i32
5032
; CHECK-NEXT: store i32 [[TMP18]], ptr [[B]], align 16
33+
; CHECK-NEXT: [[TMP19:%.*]] = extractelement <4 x i16> [[TMP16]], i32 1
34+
; CHECK-NEXT: [[TMP20:%.*]] = sext i16 [[TMP19]] to i32
5135
; CHECK-NEXT: store i32 [[TMP20]], ptr [[A]], align 8
36+
; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i16> [[TMP16]], i32 2
37+
; CHECK-NEXT: [[TMP22:%.*]] = sext i16 [[TMP21]] to i32
5238
; CHECK-NEXT: store i32 [[TMP22]], ptr [[C]], align 16
39+
; CHECK-NEXT: [[TMP23:%.*]] = extractelement <4 x i16> [[TMP16]], i32 3
40+
; CHECK-NEXT: [[TMP24:%.*]] = sext i16 [[TMP23]] to i32
5341
; CHECK-NEXT: store i32 [[TMP24]], ptr [[B]], align 8
5442
; CHECK-NEXT: ret i32 0
5543
;

‎llvm/test/Transforms/SLPVectorizer/AArch64/splat-loads.ll‎

Lines changed: 18 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -90,20 +90,18 @@ entry:
9090
define void @splat_loads_i64(ptr %array1, ptr %array2, ptr %ptrA, ptr %ptrB) {
9191
; CHECK-LABEL: @splat_loads_i64(
9292
; CHECK-NEXT: entry:
93-
; CHECK-NEXT: [[GEP_2_1:%.*]] = getelementptr inbounds i64, ptr [[ARRAY2:%.*]], i64 1
94-
; CHECK-NEXT: [[LD_2_0:%.*]] = load i64, ptr [[ARRAY2]], align 8
95-
; CHECK-NEXT: [[LD_2_1:%.*]] = load i64, ptr [[GEP_2_1]], align 8
9693
; CHECK-NEXT: [[GEP_2_2:%.*]] = getelementptr inbounds i64, ptr [[ARRAY3:%.*]], i64 1
9794
; CHECK-NEXT: [[LD_2_2:%.*]] = load i64, ptr [[ARRAY3]], align 8
9895
; CHECK-NEXT: [[LD_2_3:%.*]] = load i64, ptr [[GEP_2_2]], align 8
99-
; CHECK-NEXT: [[OR0:%.*]] = or i64 [[LD_2_0]], [[LD_2_2]]
100-
; CHECK-NEXT: [[OR1:%.*]] = or i64 [[LD_2_1]], [[LD_2_2]]
101-
; CHECK-NEXT: [[OR2:%.*]] = or i64 [[LD_2_0]], [[LD_2_3]]
102-
; CHECK-NEXT: [[OR3:%.*]] = or i64 [[LD_2_1]], [[LD_2_3]]
103-
; CHECK-NEXT: [[ADD0:%.*]] = add i64 [[OR0]], [[OR2]]
104-
; CHECK-NEXT: [[ADD1:%.*]] = add i64 [[OR1]], [[OR3]]
105-
; CHECK-NEXT: store i64 [[ADD0]], ptr [[ARRAY2]], align 8
106-
; CHECK-NEXT: store i64 [[ADD1]], ptr [[GEP_2_1]], align 8
96+
; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, ptr [[ARRAY1:%.*]], align 8
97+
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> poison, i64 [[LD_2_2]], i32 0
98+
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> poison, <2 x i32> zeroinitializer
99+
; CHECK-NEXT: [[TMP3:%.*]] = or <2 x i64> [[TMP0]], [[TMP2]]
100+
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i64> poison, i64 [[LD_2_3]], i32 0
101+
; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <2 x i64> [[TMP4]], <2 x i64> poison, <2 x i32> zeroinitializer
102+
; CHECK-NEXT: [[TMP6:%.*]] = or <2 x i64> [[TMP0]], [[TMP5]]
103+
; CHECK-NEXT: [[TMP7:%.*]] = add <2 x i64> [[TMP3]], [[TMP6]]
104+
; CHECK-NEXT: store <2 x i64> [[TMP7]], ptr [[ARRAY1]], align 8
107105
; CHECK-NEXT: ret void
108106
;
109107
entry:
@@ -133,20 +131,18 @@ entry:
133131
define void @splat_loads_i32(ptr %array1, ptr %array2, ptr %ptrA, ptr %ptrB) {
134132
; CHECK-LABEL: @splat_loads_i32(
135133
; CHECK-NEXT: entry:
136-
; CHECK-NEXT: [[GEP_2_1:%.*]] = getelementptr inbounds i32, ptr [[ARRAY2:%.*]], i64 1
137-
; CHECK-NEXT: [[LD_2_0:%.*]] = load i32, ptr [[ARRAY2]], align 8
138-
; CHECK-NEXT: [[LD_2_1:%.*]] = load i32, ptr [[GEP_2_1]], align 8
139134
; CHECK-NEXT: [[GEP_2_2:%.*]] = getelementptr inbounds i32, ptr [[ARRAY3:%.*]], i64 1
140135
; CHECK-NEXT: [[LD_2_2:%.*]] = load i32, ptr [[ARRAY3]], align 8
141136
; CHECK-NEXT: [[LD_2_3:%.*]] = load i32, ptr [[GEP_2_2]], align 8
142-
; CHECK-NEXT: [[OR0:%.*]] = or i32 [[LD_2_0]], [[LD_2_2]]
143-
; CHECK-NEXT: [[OR1:%.*]] = or i32 [[LD_2_1]], [[LD_2_2]]
144-
; CHECK-NEXT: [[OR2:%.*]] = or i32 [[LD_2_0]], [[LD_2_3]]
145-
; CHECK-NEXT: [[OR3:%.*]] = or i32 [[LD_2_1]], [[LD_2_3]]
146-
; CHECK-NEXT: [[ADD0:%.*]] = add i32 [[OR0]], [[OR2]]
147-
; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[OR1]], [[OR3]]
148-
; CHECK-NEXT: store i32 [[ADD0]], ptr [[ARRAY2]], align 4
149-
; CHECK-NEXT: store i32 [[ADD1]], ptr [[GEP_2_1]], align 4
137+
; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i32>, ptr [[ARRAY1:%.*]], align 8
138+
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[LD_2_2]], i32 0
139+
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> poison, <2 x i32> zeroinitializer
140+
; CHECK-NEXT: [[TMP3:%.*]] = or <2 x i32> [[TMP0]], [[TMP2]]
141+
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> poison, i32 [[LD_2_3]], i32 0
142+
; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <2 x i32> [[TMP4]], <2 x i32> poison, <2 x i32> zeroinitializer
143+
; CHECK-NEXT: [[TMP6:%.*]] = or <2 x i32> [[TMP0]], [[TMP5]]
144+
; CHECK-NEXT: [[TMP7:%.*]] = add <2 x i32> [[TMP3]], [[TMP6]]
145+
; CHECK-NEXT: store <2 x i32> [[TMP7]], ptr [[ARRAY1]], align 4
150146
; CHECK-NEXT: ret void
151147
;
152148
entry:

‎llvm/test/Transforms/VectorCombine/AArch64/load-extractelement-scalarization.ll‎

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -669,9 +669,8 @@ define i1 @load_with_non_power_of_2_element_type_2(ptr %x) {
669669
; Scalarizing the load for multiple constant indices may not be profitable.
670670
define i32 @load_multiple_extracts_with_constant_idx(ptr %x) {
671671
; CHECK-LABEL: @load_multiple_extracts_with_constant_idx(
672-
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds <4 x i32>, ptr [[X:%.*]], i32 0, i32 0
673-
; CHECK-NEXT: [[E_0:%.*]] = load i32, ptr [[TMP1]], align 16
674-
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds <4 x i32>, ptr [[X]], i32 0, i32 1
672+
; CHECK-NEXT: [[E_0:%.*]] = load i32, ptr [[TMP1:%.*]], align 16
673+
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds <4 x i32>, ptr [[TMP1]], i32 0, i32 1
675674
; CHECK-NEXT: [[E_1:%.*]] = load i32, ptr [[TMP2]], align 4
676675
; CHECK-NEXT: [[RES:%.*]] = add i32 [[E_0]], [[E_1]]
677676
; CHECK-NEXT: ret i32 [[RES]]
@@ -687,9 +686,8 @@ define i32 @load_multiple_extracts_with_constant_idx(ptr %x) {
687686
; because the vector large vector requires 2 vector registers.
688687
define i32 @load_multiple_extracts_with_constant_idx_profitable(ptr %x) {
689688
; CHECK-LABEL: @load_multiple_extracts_with_constant_idx_profitable(
690-
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds <8 x i32>, ptr [[X:%.*]], i32 0, i32 0
691-
; CHECK-NEXT: [[E_0:%.*]] = load i32, ptr [[TMP1]], align 16
692-
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds <8 x i32>, ptr [[X]], i32 0, i32 6
689+
; CHECK-NEXT: [[E_0:%.*]] = load i32, ptr [[TMP1:%.*]], align 16
690+
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds <8 x i32>, ptr [[TMP1]], i32 0, i32 6
693691
; CHECK-NEXT: [[E_1:%.*]] = load i32, ptr [[TMP2]], align 8
694692
; CHECK-NEXT: [[RES:%.*]] = add i32 [[E_0]], [[E_1]]
695693
; CHECK-NEXT: ret i32 [[RES]]

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