Skip to content

Commit 3dce567

Browse files
authored
AArch64: Clean up some casts to target subclasses (#165189)
Prefer getSubtarget<AArch64>(). Also avoids one unnecessary null check.
1 parent 0a34cbe commit 3dce567

File tree

5 files changed

+24
-27
lines changed

5 files changed

+24
-27
lines changed

llvm/lib/Target/AArch64/AArch64BranchTargets.cpp

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -47,6 +47,8 @@ class AArch64BranchTargets : public MachineFunctionPass {
4747
StringRef getPassName() const override { return AARCH64_BRANCH_TARGETS_NAME; }
4848

4949
private:
50+
const AArch64Subtarget *Subtarget;
51+
5052
void addBTI(MachineBasicBlock &MBB, bool CouldCall, bool CouldJump,
5153
bool NeedsWinCFI);
5254
};
@@ -75,6 +77,8 @@ bool AArch64BranchTargets::runOnMachineFunction(MachineFunction &MF) {
7577
<< "********** Function: " << MF.getName() << '\n');
7678
const Function &F = MF.getFunction();
7779

80+
Subtarget = &MF.getSubtarget<AArch64Subtarget>();
81+
7882
// LLVM does not consider basic blocks which are the targets of jump tables
7983
// to be address-taken (the address can't escape anywhere else), but they are
8084
// used for indirect branches, so need BTI instructions.
@@ -100,9 +104,8 @@ bool AArch64BranchTargets::runOnMachineFunction(MachineFunction &MF) {
100104
// a BTI, and pointing the indirect branch at that. For non-ELF targets we
101105
// can't rely on that, so we assume that `CouldCall` is _always_ true due
102106
// to the risk of long-branch thunks at link time.
103-
if (&MBB == &*MF.begin() &&
104-
(!MF.getSubtarget<AArch64Subtarget>().isTargetELF() ||
105-
(F.hasAddressTaken() || !F.hasLocalLinkage())))
107+
if (&MBB == &*MF.begin() && (!Subtarget->isTargetELF() ||
108+
(F.hasAddressTaken() || !F.hasLocalLinkage())))
106109
CouldCall = true;
107110

108111
// If the block itself is address-taken, it could be indirectly branched
@@ -132,9 +135,6 @@ void AArch64BranchTargets::addBTI(MachineBasicBlock &MBB, bool CouldCall,
132135
<< (CouldCall ? "c" : "") << " to " << MBB.getName()
133136
<< "\n");
134137

135-
const AArch64InstrInfo *TII = static_cast<const AArch64InstrInfo *>(
136-
MBB.getParent()->getSubtarget().getInstrInfo());
137-
138138
unsigned HintNum = 32;
139139
if (CouldCall)
140140
HintNum |= 2;
@@ -162,6 +162,8 @@ void AArch64BranchTargets::addBTI(MachineBasicBlock &MBB, bool CouldCall,
162162
MBBI->getOpcode() == AArch64::PACIBSP))
163163
return;
164164

165+
const AArch64InstrInfo *TII = Subtarget->getInstrInfo();
166+
165167
// Insert BTI exactly at the first executable instruction.
166168
const DebugLoc DL = MBB.findDebugLoc(MBBI);
167169
MachineInstr *BTI = BuildMI(MBB, MBBI, DL, TII->get(AArch64::HINT))

llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1871,7 +1871,7 @@ bool AArch64ExpandPseudo::expandMBB(MachineBasicBlock &MBB) {
18711871
}
18721872

18731873
bool AArch64ExpandPseudo::runOnMachineFunction(MachineFunction &MF) {
1874-
TII = static_cast<const AArch64InstrInfo *>(MF.getSubtarget().getInstrInfo());
1874+
TII = MF.getSubtarget<AArch64Subtarget>().getInstrInfo();
18751875

18761876
bool Modified = false;
18771877
for (auto &MBB : MF)

llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

Lines changed: 9 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -644,10 +644,10 @@ bool AArch64FrameLowering::hasReservedCallFrame(
644644
MachineBasicBlock::iterator AArch64FrameLowering::eliminateCallFramePseudoInstr(
645645
MachineFunction &MF, MachineBasicBlock &MBB,
646646
MachineBasicBlock::iterator I) const {
647-
const AArch64InstrInfo *TII =
648-
static_cast<const AArch64InstrInfo *>(MF.getSubtarget().getInstrInfo());
649-
const AArch64TargetLowering *TLI =
650-
MF.getSubtarget<AArch64Subtarget>().getTargetLowering();
647+
648+
const AArch64Subtarget &Subtarget = MF.getSubtarget<AArch64Subtarget>();
649+
const AArch64InstrInfo *TII = Subtarget.getInstrInfo();
650+
const AArch64TargetLowering *TLI = Subtarget.getTargetLowering();
651651
[[maybe_unused]] MachineFrameInfo &MFI = MF.getFrameInfo();
652652
DebugLoc DL = I->getDebugLoc();
653653
unsigned Opc = I->getOpcode();
@@ -1319,8 +1319,8 @@ StackOffset AArch64FrameLowering::getStackOffset(const MachineFunction &MF,
13191319
// TODO: This function currently does not work for scalable vectors.
13201320
int AArch64FrameLowering::getSEHFrameIndexOffset(const MachineFunction &MF,
13211321
int FI) const {
1322-
const auto *RegInfo = static_cast<const AArch64RegisterInfo *>(
1323-
MF.getSubtarget().getRegisterInfo());
1322+
const AArch64RegisterInfo *RegInfo =
1323+
MF.getSubtarget<AArch64Subtarget>().getRegisterInfo();
13241324
int ObjectOffset = MF.getFrameInfo().getObjectOffset(FI);
13251325
return RegInfo->getLocalAddressRegister(MF) == AArch64::FP
13261326
? getFPOffset(MF, ObjectOffset).getFixed()
@@ -1343,10 +1343,9 @@ StackOffset AArch64FrameLowering::resolveFrameOffsetReference(
13431343
TargetStackID::Value StackID, Register &FrameReg, bool PreferFP,
13441344
bool ForSimm) const {
13451345
const auto &MFI = MF.getFrameInfo();
1346-
const auto *RegInfo = static_cast<const AArch64RegisterInfo *>(
1347-
MF.getSubtarget().getRegisterInfo());
1348-
const auto *AFI = MF.getInfo<AArch64FunctionInfo>();
13491346
const auto &Subtarget = MF.getSubtarget<AArch64Subtarget>();
1347+
const AArch64RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
1348+
const auto *AFI = MF.getInfo<AArch64FunctionInfo>();
13501349

13511350
int64_t FPOffset = getFPOffset(MF, ObjectOffset).getFixed();
13521351
int64_t Offset = getStackOffset(MF, ObjectOffset).getFixed();
@@ -2443,8 +2442,7 @@ void AArch64FrameLowering::determineCalleeSaves(MachineFunction &MF,
24432442
const AArch64Subtarget &Subtarget = MF.getSubtarget<AArch64Subtarget>();
24442443

24452444
TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
2446-
const AArch64RegisterInfo *RegInfo = static_cast<const AArch64RegisterInfo *>(
2447-
MF.getSubtarget().getRegisterInfo());
2445+
const AArch64RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
24482446
AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
24492447
unsigned UnspilledCSGPR = AArch64::NoRegister;
24502448
unsigned UnspilledCSGPRPaired = AArch64::NoRegister;

llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -649,7 +649,7 @@ bool AArch64LowerHomogeneousPE::runOnMBB(MachineBasicBlock &MBB) {
649649
}
650650

651651
bool AArch64LowerHomogeneousPE::runOnMachineFunction(MachineFunction &MF) {
652-
TII = static_cast<const AArch64InstrInfo *>(MF.getSubtarget().getInstrInfo());
652+
TII = MF.getSubtarget<AArch64Subtarget>().getInstrInfo();
653653

654654
bool Modified = false;
655655
for (auto &MBB : MF)

llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp

Lines changed: 5 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,7 @@
3333
//===----------------------------------------------------------------------===//
3434

3535
#include "AArch64InstrInfo.h"
36+
#include "AArch64Subtarget.h"
3637
#include "llvm/ADT/SmallVector.h"
3738
#include "llvm/ADT/Statistic.h"
3839
#include "llvm/ADT/StringRef.h"
@@ -49,8 +50,8 @@
4950
#include "llvm/MC/MCInstrDesc.h"
5051
#include "llvm/MC/MCSchedule.h"
5152
#include "llvm/Pass.h"
52-
#include <unordered_map>
5353
#include <map>
54+
#include <unordered_map>
5455

5556
using namespace llvm;
5657

@@ -67,7 +68,7 @@ namespace {
6768
struct AArch64SIMDInstrOpt : public MachineFunctionPass {
6869
static char ID;
6970

70-
const TargetInstrInfo *TII;
71+
const AArch64InstrInfo *TII;
7172
MachineRegisterInfo *MRI;
7273
TargetSchedModel SchedModel;
7374

@@ -694,13 +695,9 @@ bool AArch64SIMDInstrOpt::runOnMachineFunction(MachineFunction &MF) {
694695
if (skipFunction(MF.getFunction()))
695696
return false;
696697

697-
TII = MF.getSubtarget().getInstrInfo();
698698
MRI = &MF.getRegInfo();
699-
const TargetSubtargetInfo &ST = MF.getSubtarget();
700-
const AArch64InstrInfo *AAII =
701-
static_cast<const AArch64InstrInfo *>(ST.getInstrInfo());
702-
if (!AAII)
703-
return false;
699+
const AArch64Subtarget &ST = MF.getSubtarget<AArch64Subtarget>();
700+
TII = ST.getInstrInfo();
704701
SchedModel.init(&ST);
705702
if (!SchedModel.hasInstrSchedModel())
706703
return false;

0 commit comments

Comments
 (0)