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BaiXilinBaiXilin
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put avxvnniint8 upgrade tests to where they should be
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‎llvm/test/CodeGen/X86/avx10.2-intrinsic-upgrade.ll‎

Lines changed: 0 additions & 192 deletions
Original file line numberDiff line numberDiff line change
@@ -2,70 +2,6 @@
22
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=X86
33
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=X64
44

5-
declare <4 x i32> @llvm.x86.avx2.vpdpbssd.128(<4 x i32>, <4 x i32>, <4 x i32>)
6-
7-
define <4 x i32>@test_int_x86_avx2_vpdpbssd_128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2) {
8-
; X86-LABEL: test_int_x86_avx2_vpdpbssd_128:
9-
; X86: # %bb.0:
10-
; X86-NEXT: vpdpbssd %xmm2, %xmm1, %xmm0 # encoding: [0x62,0xf2,0x77,0x08,0x50,0xc2]
11-
; X86-NEXT: retl # encoding: [0xc3]
12-
;
13-
; X64-LABEL: test_int_x86_avx2_vpdpbssd_128:
14-
; X64: # %bb.0:
15-
; X64-NEXT: vpdpbssd %xmm2, %xmm1, %xmm0 # encoding: [0x62,0xf2,0x77,0x08,0x50,0xc2]
16-
; X64-NEXT: retq # encoding: [0xc3]
17-
%res = call <4 x i32> @llvm.x86.avx2.vpdpbssd.128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2)
18-
ret <4 x i32> %res
19-
}
20-
21-
declare <4 x i32> @llvm.x86.avx2.vpdpbssds.128(<4 x i32>, <4 x i32>, <4 x i32>)
22-
23-
define <4 x i32>@test_int_x86_avx2_vpdpbssds_128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2) {
24-
; X86-LABEL: test_int_x86_avx2_vpdpbssds_128:
25-
; X86: # %bb.0:
26-
; X86-NEXT: vpdpbssds %xmm2, %xmm1, %xmm0 # encoding: [0x62,0xf2,0x77,0x08,0x51,0xc2]
27-
; X86-NEXT: retl # encoding: [0xc3]
28-
;
29-
; X64-LABEL: test_int_x86_avx2_vpdpbssds_128:
30-
; X64: # %bb.0:
31-
; X64-NEXT: vpdpbssds %xmm2, %xmm1, %xmm0 # encoding: [0x62,0xf2,0x77,0x08,0x51,0xc2]
32-
; X64-NEXT: retq # encoding: [0xc3]
33-
%res = call <4 x i32> @llvm.x86.avx2.vpdpbssds.128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2)
34-
ret <4 x i32> %res
35-
}
36-
37-
declare <8 x i32> @llvm.x86.avx2.vpdpbssd.256(<8 x i32>, <8 x i32>, <8 x i32>)
38-
39-
define <8 x i32>@test_int_x86_avx2_vpdpbssd_256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2) {
40-
; X86-LABEL: test_int_x86_avx2_vpdpbssd_256:
41-
; X86: # %bb.0:
42-
; X86-NEXT: vpdpbssd %ymm2, %ymm1, %ymm0 # encoding: [0x62,0xf2,0x77,0x28,0x50,0xc2]
43-
; X86-NEXT: retl # encoding: [0xc3]
44-
;
45-
; X64-LABEL: test_int_x86_avx2_vpdpbssd_256:
46-
; X64: # %bb.0:
47-
; X64-NEXT: vpdpbssd %ymm2, %ymm1, %ymm0 # encoding: [0x62,0xf2,0x77,0x28,0x50,0xc2]
48-
; X64-NEXT: retq # encoding: [0xc3]
49-
%res = call <8 x i32> @llvm.x86.avx2.vpdpbssd.256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2)
50-
ret <8 x i32> %res
51-
}
52-
53-
declare <8 x i32> @llvm.x86.avx2.vpdpbssds.256(<8 x i32>, <8 x i32>, <8 x i32>)
54-
55-
define <8 x i32>@test_int_x86_avx2_vpdpbssds_256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2) {
56-
; X86-LABEL: test_int_x86_avx2_vpdpbssds_256:
57-
; X86: # %bb.0:
58-
; X86-NEXT: vpdpbssds %ymm2, %ymm1, %ymm0 # encoding: [0x62,0xf2,0x77,0x28,0x51,0xc2]
59-
; X86-NEXT: retl # encoding: [0xc3]
60-
;
61-
; X64-LABEL: test_int_x86_avx2_vpdpbssds_256:
62-
; X64: # %bb.0:
63-
; X64-NEXT: vpdpbssds %ymm2, %ymm1, %ymm0 # encoding: [0x62,0xf2,0x77,0x28,0x51,0xc2]
64-
; X64-NEXT: retq # encoding: [0xc3]
65-
%res = call <8 x i32> @llvm.x86.avx2.vpdpbssds.256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2)
66-
ret <8 x i32> %res
67-
}
68-
695
declare <16 x i32> @llvm.x86.avx10.vpdpbssd.512(<16 x i32>, <16 x i32>, <16 x i32>)
706

717
define <16 x i32>@test_int_x86_avx10_vpdpbssd_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) {
@@ -98,70 +34,6 @@ define <16 x i32>@test_int_x86_avx10_vpdpbssds_512(<16 x i32> %x0, <16 x i32> %x
9834
ret <16 x i32> %res
9935
}
10036

101-
declare <4 x i32> @llvm.x86.avx2.vpdpbsud.128(<4 x i32>, <4 x i32>, <4 x i32>)
102-
103-
define <4 x i32>@test_int_x86_avx2_vpdpbsud_128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2) {
104-
; X86-LABEL: test_int_x86_avx2_vpdpbsud_128:
105-
; X86: # %bb.0:
106-
; X86-NEXT: vpdpbsud %xmm2, %xmm1, %xmm0 # encoding: [0x62,0xf2,0x76,0x08,0x50,0xc2]
107-
; X86-NEXT: retl # encoding: [0xc3]
108-
;
109-
; X64-LABEL: test_int_x86_avx2_vpdpbsud_128:
110-
; X64: # %bb.0:
111-
; X64-NEXT: vpdpbsud %xmm2, %xmm1, %xmm0 # encoding: [0x62,0xf2,0x76,0x08,0x50,0xc2]
112-
; X64-NEXT: retq # encoding: [0xc3]
113-
%res = call <4 x i32> @llvm.x86.avx2.vpdpbsud.128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2)
114-
ret <4 x i32> %res
115-
}
116-
117-
declare <4 x i32> @llvm.x86.avx2.vpdpbsuds.128(<4 x i32>, <4 x i32>, <4 x i32>)
118-
119-
define <4 x i32>@test_int_x86_avx2_vpdpbsuds_128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2) {
120-
; X86-LABEL: test_int_x86_avx2_vpdpbsuds_128:
121-
; X86: # %bb.0:
122-
; X86-NEXT: vpdpbsuds %xmm2, %xmm1, %xmm0 # encoding: [0x62,0xf2,0x76,0x08,0x51,0xc2]
123-
; X86-NEXT: retl # encoding: [0xc3]
124-
;
125-
; X64-LABEL: test_int_x86_avx2_vpdpbsuds_128:
126-
; X64: # %bb.0:
127-
; X64-NEXT: vpdpbsuds %xmm2, %xmm1, %xmm0 # encoding: [0x62,0xf2,0x76,0x08,0x51,0xc2]
128-
; X64-NEXT: retq # encoding: [0xc3]
129-
%res = call <4 x i32> @llvm.x86.avx2.vpdpbsuds.128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2)
130-
ret <4 x i32> %res
131-
}
132-
133-
declare <8 x i32> @llvm.x86.avx2.vpdpbsud.256(<8 x i32>, <8 x i32>, <8 x i32>)
134-
135-
define <8 x i32>@test_int_x86_avx2_vpdpbsud_256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2) {
136-
; X86-LABEL: test_int_x86_avx2_vpdpbsud_256:
137-
; X86: # %bb.0:
138-
; X86-NEXT: vpdpbsud %ymm2, %ymm1, %ymm0 # encoding: [0x62,0xf2,0x76,0x28,0x50,0xc2]
139-
; X86-NEXT: retl # encoding: [0xc3]
140-
;
141-
; X64-LABEL: test_int_x86_avx2_vpdpbsud_256:
142-
; X64: # %bb.0:
143-
; X64-NEXT: vpdpbsud %ymm2, %ymm1, %ymm0 # encoding: [0x62,0xf2,0x76,0x28,0x50,0xc2]
144-
; X64-NEXT: retq # encoding: [0xc3]
145-
%res = call <8 x i32> @llvm.x86.avx2.vpdpbsud.256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2)
146-
ret <8 x i32> %res
147-
}
148-
149-
declare <8 x i32> @llvm.x86.avx2.vpdpbsuds.256(<8 x i32>, <8 x i32>, <8 x i32>)
150-
151-
define <8 x i32>@test_int_x86_avx2_vpdpbsuds_256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2) {
152-
; X86-LABEL: test_int_x86_avx2_vpdpbsuds_256:
153-
; X86: # %bb.0:
154-
; X86-NEXT: vpdpbsuds %ymm2, %ymm1, %ymm0 # encoding: [0x62,0xf2,0x76,0x28,0x51,0xc2]
155-
; X86-NEXT: retl # encoding: [0xc3]
156-
;
157-
; X64-LABEL: test_int_x86_avx2_vpdpbsuds_256:
158-
; X64: # %bb.0:
159-
; X64-NEXT: vpdpbsuds %ymm2, %ymm1, %ymm0 # encoding: [0x62,0xf2,0x76,0x28,0x51,0xc2]
160-
; X64-NEXT: retq # encoding: [0xc3]
161-
%res = call <8 x i32> @llvm.x86.avx2.vpdpbsuds.256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2)
162-
ret <8 x i32> %res
163-
}
164-
16537
declare <16 x i32> @llvm.x86.avx10.vpdpbsud.512(<16 x i32>, <16 x i32>, <16 x i32>)
16638

16739
define <16 x i32>@test_int_x86_avx10_vpdpbsud_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) {
@@ -194,70 +66,6 @@ define <16 x i32>@test_int_x86_avx10_vpdpbsuds_512(<16 x i32> %x0, <16 x i32> %x
19466
ret <16 x i32> %res
19567
}
19668

197-
declare <4 x i32> @llvm.x86.avx2.vpdpbuud.128(<4 x i32>, <4 x i32>, <4 x i32>)
198-
199-
define <4 x i32>@test_int_x86_avx2_vpdpbuud(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2) {
200-
; X86-LABEL: test_int_x86_avx2_vpdpbuud:
201-
; X86: # %bb.0:
202-
; X86-NEXT: vpdpbuud %xmm2, %xmm1, %xmm0 # encoding: [0x62,0xf2,0x74,0x08,0x50,0xc2]
203-
; X86-NEXT: retl # encoding: [0xc3]
204-
;
205-
; X64-LABEL: test_int_x86_avx2_vpdpbuud:
206-
; X64: # %bb.0:
207-
; X64-NEXT: vpdpbuud %xmm2, %xmm1, %xmm0 # encoding: [0x62,0xf2,0x74,0x08,0x50,0xc2]
208-
; X64-NEXT: retq # encoding: [0xc3]
209-
%res = call <4 x i32> @llvm.x86.avx2.vpdpbuud.128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2)
210-
ret <4 x i32> %res
211-
}
212-
213-
declare <4 x i32> @llvm.x86.avx2.vpdpbuuds.128(<4 x i32>, <4 x i32>, <4 x i32>)
214-
215-
define <4 x i32>@test_int_x86_avx2_vpdpbuuds_128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2) {
216-
; X86-LABEL: test_int_x86_avx2_vpdpbuuds_128:
217-
; X86: # %bb.0:
218-
; X86-NEXT: vpdpbuuds %xmm2, %xmm1, %xmm0 # encoding: [0x62,0xf2,0x74,0x08,0x51,0xc2]
219-
; X86-NEXT: retl # encoding: [0xc3]
220-
;
221-
; X64-LABEL: test_int_x86_avx2_vpdpbuuds_128:
222-
; X64: # %bb.0:
223-
; X64-NEXT: vpdpbuuds %xmm2, %xmm1, %xmm0 # encoding: [0x62,0xf2,0x74,0x08,0x51,0xc2]
224-
; X64-NEXT: retq # encoding: [0xc3]
225-
%res = call <4 x i32> @llvm.x86.avx2.vpdpbuuds.128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2)
226-
ret <4 x i32> %res
227-
}
228-
229-
declare <8 x i32> @llvm.x86.avx2.vpdpbuud.256(<8 x i32>, <8 x i32>, <8 x i32>)
230-
231-
define <8 x i32>@test_int_x86_avx2_vpdpbuud_256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2) {
232-
; X86-LABEL: test_int_x86_avx2_vpdpbuud_256:
233-
; X86: # %bb.0:
234-
; X86-NEXT: vpdpbuud %ymm2, %ymm1, %ymm0 # encoding: [0x62,0xf2,0x74,0x28,0x50,0xc2]
235-
; X86-NEXT: retl # encoding: [0xc3]
236-
;
237-
; X64-LABEL: test_int_x86_avx2_vpdpbuud_256:
238-
; X64: # %bb.0:
239-
; X64-NEXT: vpdpbuud %ymm2, %ymm1, %ymm0 # encoding: [0x62,0xf2,0x74,0x28,0x50,0xc2]
240-
; X64-NEXT: retq # encoding: [0xc3]
241-
%res = call <8 x i32> @llvm.x86.avx2.vpdpbuud.256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2)
242-
ret <8 x i32> %res
243-
}
244-
245-
declare <8 x i32> @llvm.x86.avx2.vpdpbuuds.256(<8 x i32>, <8 x i32>, <8 x i32>)
246-
247-
define <8 x i32>@test_int_x86_avx2_vpdpbuuds_256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2) {
248-
; X86-LABEL: test_int_x86_avx2_vpdpbuuds_256:
249-
; X86: # %bb.0:
250-
; X86-NEXT: vpdpbuuds %ymm2, %ymm1, %ymm0 # encoding: [0x62,0xf2,0x74,0x28,0x51,0xc2]
251-
; X86-NEXT: retl # encoding: [0xc3]
252-
;
253-
; X64-LABEL: test_int_x86_avx2_vpdpbuuds_256:
254-
; X64: # %bb.0:
255-
; X64-NEXT: vpdpbuuds %ymm2, %ymm1, %ymm0 # encoding: [0x62,0xf2,0x74,0x28,0x51,0xc2]
256-
; X64-NEXT: retq # encoding: [0xc3]
257-
%res = call <8 x i32> @llvm.x86.avx2.vpdpbuuds.256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2)
258-
ret <8 x i32> %res
259-
}
260-
26169
declare <16 x i32> @llvm.x86.avx10.vpdpbuud.512(<16 x i32>, <16 x i32>, <16 x i32>)
26270

26371
define <16 x i32>@test_int_x86_avx10_vpdpbuud_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) {

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