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Fix missing newline
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llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -153,6 +153,14 @@ cl::opt<bool> EnableSVEGISel(
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cl::desc("Enable / disable SVE scalable vectors in Global ISel"),
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cl::init(false));
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// TODO: This option should be removed once we switch to always using PTRADD in
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// the SelectionDAG.
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static cl::opt<bool> UseFEATCPACodegen(
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"aarch64-use-featcpa-codegen", cl::Hidden,
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cl::desc("Generate ISD::PTRADD nodes for pointer arithmetic in "
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"SelectionDAG for FEAT_CPA"),
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cl::init(false));
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/// Value type used for condition codes.
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static const MVT MVT_CC = MVT::i32;
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@@ -30420,4 +30428,4 @@ bool AArch64TargetLowering::isTypeDesirableForOp(unsigned Opc, EVT VT) const {
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bool AArch64TargetLowering::shouldPreservePtrArith(const Function &F,
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EVT VT) const {
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return Subtarget->hasCPA() && Subtarget->hasCPACodegen();
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}
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}

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