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bernhardubernhardu
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Support in GetInstructionSize instructions used by Wine.
This patch adds several instructions seen when trying to run a executable built with ASan with llvm-mingw, with the tip of the main branch from llvm-project (x86 and x86_64). Also another missing instruction visible in the issue 96270. Also includes instructions collected by Roman Pišl and Eric Pouech in the Wine bug reports below. Also changes "44 0f b6 1a" to return 4 instead of 5 (MR 111638). Fixes: #96270 Co-authored-by: Roman Pišl <[email protected]> https://bugs.winehq.org/show_bug.cgi?id=50993 https://bugs.winehq.org/attachment.cgi?id=70233 Co-authored-by: Eric Pouech <[email protected]> https://bugs.winehq.org/show_bug.cgi?id=52386 https://bugs.winehq.org/attachment.cgi?id=71626
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‎compiler-rt/lib/interception/interception_win.cpp‎

Lines changed: 59 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -528,6 +528,7 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
528528

529529
case 0xb8: // b8 XX XX XX XX : mov eax, XX XX XX XX
530530
case 0xB9: // b9 XX XX XX XX : mov ecx, XX XX XX XX
531+
case 0xBA: // ba XX XX XX XX : mov edx, XX XX XX XX
531532
return 5;
532533

533534
// Cannot overwrite control-instruction. Return 0 to indicate failure.
@@ -558,16 +559,28 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
558559
case 0xFF8B: // 8B FF : mov edi, edi
559560
case 0xEC8B: // 8B EC : mov ebp, esp
560561
case 0xc889: // 89 C8 : mov eax, ecx
562+
case 0xD189: // 89 D1 : mov ecx, edx
561563
case 0xE589: // 89 E5 : mov ebp, esp
562564
case 0xC18B: // 8B C1 : mov eax, ecx
565+
case 0xC031: // 31 C0 : xor eax, eax
566+
case 0xC931: // 31 C9 : xor ecx, ecx
567+
case 0xD231: // 31 D2 : xor edx, edx
563568
case 0xC033: // 33 C0 : xor eax, eax
564569
case 0xC933: // 33 C9 : xor ecx, ecx
565570
case 0xD233: // 33 D2 : xor edx, edx
566571
case 0xDB84: // 84 DB : test bl,bl
572+
case 0xC084: // 84 C0 : test al,al
567573
case 0xC984: // 84 C9 : test cl,cl
568574
case 0xD284: // 84 D2 : test dl,dl
569575
return 2;
570576

577+
case 0x3980: // 80 39 XX : cmp BYTE PTR [rcx], XX
578+
case 0xE483: // 83 E4 XX : and esp, XX
579+
case 0x4D8B: // 8B 4D XX : mov XX(%ebp), ecx
580+
case 0x558B: // 8B 55 XX : mov XX(%ebp), edx
581+
case 0x758B: // 8B 75 XX : mov XX(%ebp), esp
582+
return 3;
583+
571584
// Cannot overwrite control-instruction. Return 0 to indicate failure.
572585
case 0x25FF: // FF 25 XX XX XX XX : jmp [XXXXXXXX]
573586
return 0;
@@ -577,6 +590,8 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
577590
case 0xF8E483: // 83 E4 F8 : and esp, 0xFFFFFFF8
578591
case 0x64EC83: // 83 EC 64 : sub esp, 64h
579592
return 3;
593+
case 0x244C8D: // 8D 4C 24 XX : lea ecx, [esp + XX]
594+
return 4;
580595
case 0x24A48D: // 8D A4 24 XX XX XX XX : lea esp, [esp + XX XX XX XX]
581596
return 7;
582597
}
@@ -643,6 +658,8 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
643658
case 0x7980: // 80 79 YY XX cmp BYTE ptr [rcx+YY], XX
644659
return 4;
645660

661+
case 0xb841: // 41 b8 XX XX XX XX : mov r8d, XX XX XX XX
662+
return 6;
646663
case 0x058B: // 8B 05 XX XX XX XX : mov eax, dword ptr [XX XX XX XX]
647664
if (rel_offset)
648665
*rel_offset = 2;
@@ -673,6 +690,9 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
673690
case 0xc1ff48: // 48 ff c1 : inc rcx
674691
case 0xc1ff49: // 49 ff c1 : inc r9
675692
case 0xc28b41: // 41 8b c2 : mov eax, r10d
693+
case 0x01b60f: // 0f b6 01 : movzx eax, BYTE PTR [rcx]
694+
case 0x09b60f: // 0f b6 09 : movzx ecx, BYTE PTR [rcx]
695+
case 0x11b60f: // 0f b6 11 : movzx edx, BYTE PTR [rcx]
676696
case 0xc2b60f: // 0f b6 c2 : movzx eax, dl
677697
case 0xc2ff48: // 48 ff c2 : inc rdx
678698
case 0xc2ff49: // 49 ff c2 : inc r10
@@ -702,15 +722,31 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
702722
case 0xd2b60f: // 0f b6 d2 : movzx edx, dl
703723
case 0xd98b4c: // 4c 8b d9 : mov r11, rcx
704724
case 0xd9f748: // 48 f7 d9 : neg rcx
725+
case 0xc03145: // 45 31 c0 : xor r8d,r8d
726+
case 0xc93145: // 45 31 c9 : xor r9d,r9d
705727
case 0xdb3345: // 45 33 db : xor r11d, r11d
728+
case 0xc08445: // 45 84 c0 : test r8b,r8b
729+
case 0xd28445: // 45 84 d2 : test r10b,r10b
706730
case 0xdb8548: // 48 85 db : test rbx, rbx
707731
case 0xdb854d: // 4d 85 db : test r11, r11
708732
case 0xdc8b4c: // 4c 8b dc : mov r11, rsp
709733
case 0xe0e483: // 83 e4 e0 : and esp, 0xFFFFFFE0
710734
case 0xe48548: // 48 85 e4 : test rsp, rsp
711735
case 0xe4854d: // 4d 85 e4 : test r12, r12
736+
case 0xc88948: // 48 89 c8 : mov rax,rcx
737+
case 0xcb8948: // 48 89 cb : mov rbx,rcx
738+
case 0xd08948: // 48 89 d0 : mov rax,rdx
739+
case 0xd18948: // 48 89 d1 : mov rcx,rdx
740+
case 0xd38948: // 48 89 d3 : mov rbx,rdx
712741
case 0xe58948: // 48 89 e5 : mov rbp, rsp
713742
case 0xed8548: // 48 85 ed : test rbp, rbp
743+
case 0xc88949: // 49 89 c8 : mov r8, rcx
744+
case 0xc98949: // 49 89 c9 : mov r9, rcx
745+
case 0xca8949: // 49 89 ca : mov r10,rcx
746+
case 0xd08949: // 49 89 d0 : mov r8, rdx
747+
case 0xd18949: // 49 89 d1 : mov r9, rdx
748+
case 0xd28949: // 49 89 d2 : mov r10, rdx
749+
case 0xd38949: // 49 89 d3 : mov r11, rdx
714750
case 0xed854d: // 4d 85 ed : test r13, r13
715751
case 0xf6854d: // 4d 85 f6 : test r14, r14
716752
case 0xff854d: // 4d 85 ff : test r15, r15
@@ -721,6 +757,8 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
721757
case 0x588948: // 48 89 58 XX : mov QWORD PTR[rax + XX], rbx
722758
case 0xec8348: // 48 83 ec XX : sub rsp, XX
723759
case 0xf88349: // 49 83 f8 XX : cmp r8, XX
760+
case 0x148d4e: // 4e 8d 14 XX : lea r10, [rcx+r8*XX]
761+
case 0x398366: // 66 83 39 XX : cmp WORD PTR [rcx], XX
724762
return 4;
725763

726764
case 0x246483: // 83 64 24 XX YY : and DWORD PTR [rsp+XX], YY
@@ -768,7 +806,14 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
768806
}
769807

770808
switch (*(u32*)(address)) {
809+
case 0x01b60f44: // 44 0f b6 01 : movzx r8d, BYTE PTR [rcx]
810+
case 0x09b60f44: // 44 0f b6 09 : movzx r9d, BYTE PTR [rcx]
811+
case 0x0ab60f44: // 44 0f b6 0a : movzx r8d, BYTE PTR [rdx]
812+
case 0x11b60f44: // 44 0f b6 11 : movzx r10d, BYTE PTR [rcx]
771813
case 0x1ab60f44: // 44 0f b6 1a : movzx r11d, BYTE PTR [rdx]
814+
case 0x11048d4c: // 4c 8d 04 11 : lea r8,[rcx+rdx*1]
815+
case 0xff488d49: // 49 8d 48 ff : lea rcx,[r8-0x1]
816+
return 4;
772817
case 0x24448b48: // 48 8b 44 24 XX : mov rax, QWORD ptr [rsp + XX]
773818
case 0x246c8948: // 48 89 6C 24 XX : mov QWORD ptr [rsp + XX], rbp
774819
case 0x245c8948: // 48 89 5c 24 XX : mov QWORD PTR [rsp + XX], rbx
@@ -784,6 +829,20 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
784829
return 5;
785830
case 0x24648348: // 48 83 64 24 XX YY : and QWORD PTR [rsp + XX], YY
786831
return 6;
832+
case 0x24A48D48: // 48 8D A4 24 XX YY ZZ WW : lea rsp, [rsp + WWZZYYXX]
833+
return 8;
834+
}
835+
836+
switch (0xFFFFFFFFFFULL & *(u64*)(address)) {
837+
case 0xC07E0F4866: // 66 48 0F 7E C0 : movq rax,xmm0 (for wine fexp)
838+
case 0x0000441F0F: // 0F 1F 44 00 00 : nop DWORD PTR [rax+rax*1+0x0]
839+
return 5;
840+
}
841+
842+
switch (*(u64*)(address)) {
843+
case 0x010101010101b848: // 48 b8 01 01 01 01 01 01 01 01
844+
// movabs rax,0x101010101010101
845+
return 10;
787846
}
788847

789848
#else

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