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skatrakskatrak
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[MLIR][Flang][OpenMP] Make omp.simdloop into a loop wrapper (#87365)
This patch updates the definition of `omp.simdloop` to enforce the restrictions of a wrapper operation. It has been renamed to `omp.simd`, to better reflect the naming used in the spec. All uses of "simdloop" in function names have been updated accordingly. Some changes to Flang lowering and OpenMP to LLVM IR translation are introduced to prevent the introduction of compilation/test failures. The eventual long term solution might be different.
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-592
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20 files changed

+701
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‎flang/lib/Lower/OpenMP/OpenMP.cpp‎

Lines changed: 110 additions & 57 deletions
Large diffs are not rendered by default.

‎flang/test/Fir/convert-to-llvm-openmp-and-fir.fir‎

Lines changed: 54 additions & 47 deletions
Original file line numberDiff line numberDiff line change
@@ -180,14 +180,16 @@ func.func @_QPsimd1(%arg0: !fir.ref<i32> {fir.bindc_name = "n"}, %arg1: !fir.ref
180180
omp.parallel {
181181
%1 = fir.alloca i32 {adapt.valuebyref, pinned}
182182
%2 = fir.load %arg0 : !fir.ref<i32>
183-
omp.simdloop for (%arg2) : i32 = (%c1_i32) to (%2) step (%c1_i32) {
184-
fir.store %arg2 to %1 : !fir.ref<i32>
185-
%3 = fir.load %1 : !fir.ref<i32>
186-
%4 = fir.convert %3 : (i32) -> i64
187-
%5 = arith.subi %4, %c1_i64 : i64
188-
%6 = fir.coordinate_of %arg1, %5 : (!fir.ref<!fir.array<?xi32>>, i64) -> !fir.ref<i32>
189-
fir.store %3 to %6 : !fir.ref<i32>
190-
omp.yield
183+
omp.simd {
184+
omp.loop_nest (%arg2) : i32 = (%c1_i32) to (%2) step (%c1_i32) {
185+
fir.store %arg2 to %1 : !fir.ref<i32>
186+
%3 = fir.load %1 : !fir.ref<i32>
187+
%4 = fir.convert %3 : (i32) -> i64
188+
%5 = arith.subi %4, %c1_i64 : i64
189+
%6 = fir.coordinate_of %arg1, %5 : (!fir.ref<!fir.array<?xi32>>, i64) -> !fir.ref<i32>
190+
fir.store %3 to %6 : !fir.ref<i32>
191+
omp.yield
192+
}
191193
}
192194
omp.terminator
193195
}
@@ -202,8 +204,8 @@ func.func @_QPsimd1(%arg0: !fir.ref<i32> {fir.bindc_name = "n"}, %arg1: !fir.ref
202204
// CHECK: %[[ONE_3:.*]] = llvm.mlir.constant(1 : i64) : i64
203205
// CHECK: %[[I_VAR:.*]] = llvm.alloca %[[ONE_3]] x i32 {pinned} : (i64) -> !llvm.ptr
204206
// CHECK: %[[N:.*]] = llvm.load %[[N_REF]] : !llvm.ptr -> i32
205-
// CHECK: omp.simdloop
206-
// CHECK-SAME: (%[[I:.*]]) : i32 = (%[[ONE_2]]) to (%[[N]]) step (%[[ONE_2]]) {
207+
// CHECK: omp.simd {
208+
// CHECK-NEXT: omp.loop_nest (%[[I:.*]]) : i32 = (%[[ONE_2]]) to (%[[N]]) step (%[[ONE_2]]) {
207209
// CHECK: llvm.store %[[I]], %[[I_VAR]] : i32, !llvm.ptr
208210
// CHECK: %[[I1:.*]] = llvm.load %[[I_VAR]] : !llvm.ptr -> i32
209211
// CHECK: %[[I1_EXT:.*]] = llvm.sext %[[I1]] : i32 to i64
@@ -212,6 +214,7 @@ func.func @_QPsimd1(%arg0: !fir.ref<i32> {fir.bindc_name = "n"}, %arg1: !fir.ref
212214
// CHECK: llvm.store %[[I1]], %[[ARR_I_REF]] : i32, !llvm.ptr
213215
// CHECK: omp.yield
214216
// CHECK: }
217+
// CHECK: }
215218
// CHECK: omp.terminator
216219
// CHECK: }
217220
// CHECK: llvm.return
@@ -471,55 +474,59 @@ func.func @_QPomp_target() {
471474

472475
// -----
473476

474-
func.func @_QPsimdloop_with_nested_loop() {
477+
func.func @_QPsimd_with_nested_loop() {
475478
%0 = fir.alloca i32 {adapt.valuebyref}
476-
%1 = fir.alloca !fir.array<10xi32> {bindc_name = "a", uniq_name = "_QFsimdloop_with_nested_loopEa"}
477-
%2 = fir.alloca i32 {bindc_name = "i", uniq_name = "_QFsimdloop_with_nested_loopEi"}
478-
%3 = fir.alloca i32 {bindc_name = "j", uniq_name = "_QFsimdloop_with_nested_loopEj"}
479+
%1 = fir.alloca !fir.array<10xi32> {bindc_name = "a", uniq_name = "_QFsimd_with_nested_loopEa"}
480+
%2 = fir.alloca i32 {bindc_name = "i", uniq_name = "_QFsimd_with_nested_loopEi"}
481+
%3 = fir.alloca i32 {bindc_name = "j", uniq_name = "_QFsimd_with_nested_loopEj"}
479482
%c1_i32 = arith.constant 1 : i32
480483
%c10_i32 = arith.constant 10 : i32
481484
%c1_i32_0 = arith.constant 1 : i32
482-
omp.simdloop for (%arg0) : i32 = (%c1_i32) to (%c10_i32) inclusive step (%c1_i32_0) {
483-
fir.store %arg0 to %0 : !fir.ref<i32>
484-
%c1_i32_1 = arith.constant 1 : i32
485-
%4 = fir.convert %c1_i32_1 : (i32) -> index
486-
%c10_i32_2 = arith.constant 10 : i32
487-
%5 = fir.convert %c10_i32_2 : (i32) -> index
488-
%c1 = arith.constant 1 : index
489-
%6 = fir.do_loop %arg1 = %4 to %5 step %c1 -> index {
490-
%8 = fir.convert %arg1 : (index) -> i32
491-
fir.store %8 to %3 : !fir.ref<i32>
492-
%9 = fir.load %0 : !fir.ref<i32>
493-
%10 = fir.load %0 : !fir.ref<i32>
494-
%11 = fir.convert %10 : (i32) -> i64
495-
%c1_i64 = arith.constant 1 : i64
496-
%12 = arith.subi %11, %c1_i64 : i64
497-
%13 = fir.coordinate_of %1, %12 : (!fir.ref<!fir.array<10xi32>>, i64) -> !fir.ref<i32>
498-
fir.store %9 to %13 : !fir.ref<i32>
499-
%14 = arith.addi %arg1, %c1 : index
500-
fir.result %14 : index
485+
omp.simd {
486+
omp.loop_nest (%arg0) : i32 = (%c1_i32) to (%c10_i32) inclusive step (%c1_i32_0) {
487+
fir.store %arg0 to %0 : !fir.ref<i32>
488+
%c1_i32_1 = arith.constant 1 : i32
489+
%4 = fir.convert %c1_i32_1 : (i32) -> index
490+
%c10_i32_2 = arith.constant 10 : i32
491+
%5 = fir.convert %c10_i32_2 : (i32) -> index
492+
%c1 = arith.constant 1 : index
493+
%6 = fir.do_loop %arg1 = %4 to %5 step %c1 -> index {
494+
%8 = fir.convert %arg1 : (index) -> i32
495+
fir.store %8 to %3 : !fir.ref<i32>
496+
%9 = fir.load %0 : !fir.ref<i32>
497+
%10 = fir.load %0 : !fir.ref<i32>
498+
%11 = fir.convert %10 : (i32) -> i64
499+
%c1_i64 = arith.constant 1 : i64
500+
%12 = arith.subi %11, %c1_i64 : i64
501+
%13 = fir.coordinate_of %1, %12 : (!fir.ref<!fir.array<10xi32>>, i64) -> !fir.ref<i32>
502+
fir.store %9 to %13 : !fir.ref<i32>
503+
%14 = arith.addi %arg1, %c1 : index
504+
fir.result %14 : index
505+
}
506+
%7 = fir.convert %6 : (index) -> i32
507+
fir.store %7 to %3 : !fir.ref<i32>
508+
omp.yield
501509
}
502-
%7 = fir.convert %6 : (index) -> i32
503-
fir.store %7 to %3 : !fir.ref<i32>
504-
omp.yield
505510
}
506511
return
507512
}
508513

509-
// CHECK-LABEL: llvm.func @_QPsimdloop_with_nested_loop() {
514+
// CHECK-LABEL: llvm.func @_QPsimd_with_nested_loop() {
510515
// CHECK: %[[LOWER:.*]] = llvm.mlir.constant(1 : i32) : i32
511516
// CHECK: %[[UPPER:.*]] = llvm.mlir.constant(10 : i32) : i32
512517
// CHECK: %[[STEP:.*]] = llvm.mlir.constant(1 : i32) : i32
513-
// CHECK: omp.simdloop for (%[[CNT:.*]]) : i32 = (%[[LOWER]]) to (%[[UPPER]]) inclusive step (%[[STEP]]) {
514-
// CHECK: llvm.br ^bb1(%[[VAL_1:.*]], %[[VAL_2:.*]] : i64, i64)
515-
// CHECK: ^bb1(%[[VAL_3:.*]]: i64, %[[VAL_4:.*]]: i64):
516-
// CHECK: %[[VAL_5:.*]] = llvm.mlir.constant(0 : index) : i64
517-
// CHECK: %[[VAL_6:.*]] = llvm.icmp "sgt" %[[VAL_4]], %[[VAL_5]] : i64
518-
// CHECK: llvm.cond_br %[[VAL_6]], ^bb2, ^bb3
519-
// CHECK: ^bb2:
520-
// CHECK: llvm.br ^bb1(%[[VAL_7:.*]], %[[VAL_8:.*]] : i64, i64)
521-
// CHECK: ^bb3:
522-
// CHECK: omp.yield
518+
// CHECK: omp.simd {
519+
// CHECK-NEXT: omp.loop_nest (%[[CNT:.*]]) : i32 = (%[[LOWER]]) to (%[[UPPER]]) inclusive step (%[[STEP]]) {
520+
// CHECK: llvm.br ^bb1(%[[VAL_1:.*]], %[[VAL_2:.*]] : i64, i64)
521+
// CHECK: ^bb1(%[[VAL_3:.*]]: i64, %[[VAL_4:.*]]: i64):
522+
// CHECK: %[[VAL_5:.*]] = llvm.mlir.constant(0 : index) : i64
523+
// CHECK: %[[VAL_6:.*]] = llvm.icmp "sgt" %[[VAL_4]], %[[VAL_5]] : i64
524+
// CHECK: llvm.cond_br %[[VAL_6]], ^bb2, ^bb3
525+
// CHECK: ^bb2:
526+
// CHECK: llvm.br ^bb1(%[[VAL_7:.*]], %[[VAL_8:.*]] : i64, i64)
527+
// CHECK: ^bb3:
528+
// CHECK: omp.yield
529+
// CHECK: }
523530
// CHECK: }
524531
// CHECK: llvm.return
525532
// CHECK: }

‎flang/test/Lower/OpenMP/FIR/if-clause.f90‎

Lines changed: 11 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -116,15 +116,15 @@ program main
116116
do i = 1, 10
117117
end do
118118
!$omp end parallel do simd
119-
119+
120120
! CHECK: omp.parallel
121121
! CHECK-SAME: if({{.*}})
122122
! CHECK: omp.wsloop
123123
!$omp parallel do simd if(parallel: .true.) if(simd: .false.)
124124
do i = 1, 10
125125
end do
126126
!$omp end parallel do simd
127-
127+
128128
! CHECK: omp.parallel
129129
! CHECK-SAME: if({{.*}})
130130
! CHECK: omp.wsloop
@@ -134,7 +134,7 @@ program main
134134
do i = 1, 10
135135
end do
136136
!$omp end parallel do simd
137-
137+
138138
! CHECK: omp.parallel
139139
! CHECK-NOT: if({{.*}})
140140
! CHECK-SAME: {
@@ -147,22 +147,22 @@ program main
147147
! ----------------------------------------------------------------------------
148148
! SIMD
149149
! ----------------------------------------------------------------------------
150-
! CHECK: omp.simdloop
150+
! CHECK: omp.simd
151151
! CHECK-NOT: if({{.*}})
152152
! CHECK-SAME: {
153153
!$omp simd
154154
do i = 1, 10
155155
end do
156156
!$omp end simd
157157

158-
! CHECK: omp.simdloop
158+
! CHECK: omp.simd
159159
! CHECK-SAME: if({{.*}})
160160
!$omp simd if(.true.)
161161
do i = 1, 10
162162
end do
163163
!$omp end simd
164164

165-
! CHECK: omp.simdloop
165+
! CHECK: omp.simd
166166
! CHECK-SAME: if({{.*}})
167167
!$omp simd if(simd: .true.)
168168
do i = 1, 10
@@ -281,7 +281,6 @@ program main
281281
end do
282282
!$omp end target parallel do
283283

284-
285284
! CHECK: omp.target
286285
! CHECK-NOT: if({{.*}})
287286
! CHECK-SAME: {
@@ -360,7 +359,7 @@ program main
360359
! CHECK: omp.target
361360
! CHECK-NOT: if({{.*}})
362361
! CHECK-SAME: {
363-
! CHECK: omp.simdloop
362+
! CHECK: omp.simd
364363
! CHECK-NOT: if({{.*}})
365364
! CHECK-SAME: {
366365
!$omp target simd
@@ -370,7 +369,7 @@ program main
370369

371370
! CHECK: omp.target
372371
! CHECK-SAME: if({{.*}})
373-
! CHECK: omp.simdloop
372+
! CHECK: omp.simd
374373
! CHECK-SAME: if({{.*}})
375374
!$omp target simd if(.true.)
376375
do i = 1, 10
@@ -379,7 +378,7 @@ program main
379378

380379
! CHECK: omp.target
381380
! CHECK-SAME: if({{.*}})
382-
! CHECK: omp.simdloop
381+
! CHECK: omp.simd
383382
! CHECK-SAME: if({{.*}})
384383
!$omp target simd if(target: .true.) if(simd: .false.)
385384
do i = 1, 10
@@ -388,7 +387,7 @@ program main
388387

389388
! CHECK: omp.target
390389
! CHECK-SAME: if({{.*}})
391-
! CHECK: omp.simdloop
390+
! CHECK: omp.simd
392391
! CHECK-NOT: if({{.*}})
393392
! CHECK-SAME: {
394393
!$omp target simd if(target: .true.)
@@ -399,7 +398,7 @@ program main
399398
! CHECK: omp.target
400399
! CHECK-NOT: if({{.*}})
401400
! CHECK-SAME: {
402-
! CHECK: omp.simdloop
401+
! CHECK: omp.simd
403402
! CHECK-SAME: if({{.*}})
404403
!$omp target simd if(simd: .true.)
405404
do i = 1, 10

‎flang/test/Lower/OpenMP/FIR/loop-combined.f90‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -75,7 +75,7 @@ program main
7575
! TARGET SIMD
7676
! ----------------------------------------------------------------------------
7777
! CHECK: omp.target
78-
! CHECK: omp.simdloop
78+
! CHECK: omp.simd
7979
!$omp target simd
8080
do i = 1, 10
8181
end do

‎flang/test/Lower/OpenMP/FIR/parallel-private-clause.f90‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -361,7 +361,8 @@ subroutine simd_loop_1
361361
! FIRDialect: %[[UB:.*]] = arith.constant 9 : i32
362362
! FIRDialect: %[[STEP:.*]] = arith.constant 1 : i32
363363

364-
! FIRDialect: omp.simdloop for (%[[I:.*]]) : i32 = (%[[LB]]) to (%[[UB]]) inclusive step (%[[STEP]]) {
364+
! FIRDialect: omp.simd {
365+
! FIRDialect-NEXT: omp.loop_nest (%[[I:.*]]) : i32 = (%[[LB]]) to (%[[UB]]) inclusive step (%[[STEP]]) {
365366
!$OMP SIMD PRIVATE(r)
366367
do i=1, 9
367368
! FIRDialect: fir.store %[[I]] to %[[LOCAL:.*]] : !fir.ref<i32>

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