combine 34bit print with 32bit

Rewrite isS34Imm() to a template function and rename function to reflect actual checks.

Author: lei137

llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp

@@ -365,14 +365,12 @@ struct PPCOperand : public MCParsedAsmOperand {
   bool isS16ImmX4() const { return isExtImm<16>(/*Signed*/ true, 4); }
   bool isS16ImmX16() const { return isExtImm<16>(/*Signed*/ true, 16); }
   bool isS17Imm() const { return isExtImm<17>(/*Signed*/ true, 1); }
-  bool isS32Imm() const {
-    // TODO: Is ContextImmediate needed?
-    return Kind == Expression || isSImm<32>();
-  }
-  bool isS34Imm() const {
+
+  template <uint64_t N>
+  bool isSImmExpr() const {
     // Once the PC-Rel ABI is finalized, evaluate whether a 34-bit
     // ContextImmediate is needed.
-    return Kind == Expression || isSImm<34>();
+    return Kind == Expression || isSImm<N>();
   }
   bool isS34ImmX16() const {
     return Kind == Expression || (isSImm<34>() && (getImm() & 15) == 0);

llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp

@@ -430,29 +430,18 @@ void PPCInstPrinter::printS16ImmOperand(const MCInst *MI, unsigned OpNo,
     printOperand(MI, OpNo, STI, O);
 }
 
-void PPCInstPrinter::printS32ImmOperand(const MCInst *MI, unsigned OpNo,
+template<uint64_t N>
+void PPCInstPrinter::printSImmOperand(const MCInst *MI, unsigned OpNo,
                                         const MCSubtargetInfo &STI,
                                         raw_ostream &O) {
   if (MI->getOperand(OpNo).isImm()) {
-    long long Value = MI->getOperand(OpNo).getImm();
-    assert(isInt<32>(Value) && "Invalid s32imm argument!");
-    O << (long long)Value;
+    int64_t Value = MI->getOperand(OpNo).getImm();
+    assert(isInt<N>(Value) && "Invalid imm argument!");
+    O << (int64_t)Value;
   } else
     printOperand(MI, OpNo, STI, O);
 }
 
-void PPCInstPrinter::printS34ImmOperand(const MCInst *MI, unsigned OpNo,
-                                        const MCSubtargetInfo &STI,
-                                        raw_ostream &O) {
-  if (MI->getOperand(OpNo).isImm()) {
-    long long Value = MI->getOperand(OpNo).getImm();
-    assert(isInt<34>(Value) && "Invalid s34imm argument!");
-    O << (long long)Value;
-  }
-  else
-    printOperand(MI, OpNo, STI, O);
-}
-
 void PPCInstPrinter::printU16ImmOperand(const MCInst *MI, unsigned OpNo,
                                         const MCSubtargetInfo &STI,
                                         raw_ostream &O) {
@@ -543,7 +532,7 @@ void PPCInstPrinter::printMemRegImmHash(const MCInst *MI, unsigned OpNo,
 void PPCInstPrinter::printMemRegImm34PCRel(const MCInst *MI, unsigned OpNo,
                                            const MCSubtargetInfo &STI,
                                            raw_ostream &O) {
-  printS34ImmOperand(MI, OpNo, STI, O);
+  printSImmOperand<34>(MI, OpNo, STI, O);
   O << '(';
   printImmZeroOperand(MI, OpNo + 1, STI, O);
   O << ')';
@@ -552,7 +541,7 @@ void PPCInstPrinter::printMemRegImm34PCRel(const MCInst *MI, unsigned OpNo,
 void PPCInstPrinter::printMemRegImm34(const MCInst *MI, unsigned OpNo,
                                       const MCSubtargetInfo &STI,
                                       raw_ostream &O) {
-  printS34ImmOperand(MI, OpNo, STI, O);
+  printSImmOperand<34>(MI, OpNo, STI, O);
   O << '(';
   printOperand(MI, OpNo + 1, STI, O);
   O << ')';

llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h

@@ -80,9 +80,8 @@ class PPCInstPrinter : public MCInstPrinter {
                           const MCSubtargetInfo &STI, raw_ostream &O);
   void printS16ImmOperand(const MCInst *MI, unsigned OpNo,
                           const MCSubtargetInfo &STI, raw_ostream &O);
-  void printS32ImmOperand(const MCInst *MI, unsigned OpNo,
-                          const MCSubtargetInfo &STI, raw_ostream &O);
-  void printS34ImmOperand(const MCInst *MI, unsigned OpNo,
+  template<uint64_t N>
+  void printSImmOperand(const MCInst *MI, unsigned OpNo,
                           const MCSubtargetInfo &STI, raw_ostream &O);
   void printU16ImmOperand(const MCInst *MI, unsigned OpNo,
                           const MCSubtargetInfo &STI, raw_ostream &O);

llvm/lib/Target/PowerPC/PPCRegisterInfo.td

@@ -810,37 +810,37 @@ def s17imm64 : Operand<i64> {
 }
 def PPCS32ImmAsmOperand : AsmOperandClass {
   let Name = "S32Imm";
-  let PredicateMethod = "isS32Imm";
+  let PredicateMethod = "isSImmExpr<32>";
   let RenderMethod = "addImmOperands";
 }
 def s32imm : Operand<i64> {
-  let PrintMethod = "printS32ImmOperand";
+  let PrintMethod = "printSImmOperand<32>";
   let EncoderMethod = "getImmEncoding<PPC::fixup_ppc_imm32>";
   let ParserMatchClass = PPCS32ImmAsmOperand;
   let DecoderMethod = "decodeSImmOperand<32>";
   let OperandType = "OPERAND_IMMEDIATE";
 }
 def s32imm_pcrel : Operand<i64> {
-  let PrintMethod = "printS32ImmOperand";
+  let PrintMethod = "printSImmOperand<32>";
   let EncoderMethod = "getImmEncoding<PPC::fixup_ppc_pcrel32>";
   let ParserMatchClass = PPCS32ImmAsmOperand;
   let DecoderMethod = "decodeSImmOperand<32>";
   let OperandType = "OPERAND_IMMEDIATE";
 }
 def PPCS34ImmAsmOperand : AsmOperandClass {
   let Name = "S34Imm";
-  let PredicateMethod = "isS34Imm";
+  let PredicateMethod = "isSImmExpr<34>";
   let RenderMethod = "addImmOperands";
 }
 def s34imm : Operand<i64> {
-  let PrintMethod = "printS34ImmOperand";
+  let PrintMethod = "printSImmOperand<34>";
   let EncoderMethod = "getImmEncoding<PPC::fixup_ppc_imm34>";
   let ParserMatchClass = PPCS34ImmAsmOperand;
   let DecoderMethod = "decodeSImmOperand<34>";
   let OperandType = "OPERAND_IMMEDIATE";
 }
 def s34imm_pcrel : Operand<i64> {
-  let PrintMethod = "printS34ImmOperand";
+  let PrintMethod = "printSImmOperand<34>";
   let EncoderMethod = "getImmEncoding<PPC::fixup_ppc_pcrel34>";
   let ParserMatchClass = PPCS34ImmAsmOperand;
   let DecoderMethod = "decodeSImmOperand<34>";
@@ -933,7 +933,8 @@ def ptr_rc_nor0 : RegisterOperand<ptr_rc_nor0_by_hwmode> {
 
 // New addressing modes with 34 bit immediates.
 def PPCDispRI34Operand : AsmOperandClass {
-  let Name = "DispRI34"; let PredicateMethod = "isS34Imm";
+  let Name = "DispRI34";
+  let PredicateMethod = "isSImmExpr<34>";
   let RenderMethod = "addImmOperands";
 }
 def dispRI34 : Operand<iPTR> {