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rampitecrampitec
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Revert "[AMDGPU] Fold copies of constant physical registers into their uses (#154183)" (#154219)
This reverts commit 3395676. Fails libc/test/src/string/libc.test.src.string.memmove_test.__hermetic__
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6 files changed

+787
-597
lines changed

6 files changed

+787
-597
lines changed

‎llvm/lib/Target/AMDGPU/SIFoldOperands.cpp

Lines changed: 2 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -709,10 +709,7 @@ bool SIFoldOperandsImpl::updateOperand(FoldCandidate &Fold) const {
709709
// 16-bit SGPRs instead of 32-bit ones.
710710
if (Old.getSubReg() == AMDGPU::lo16 && TRI->isSGPRReg(*MRI, New->getReg()))
711711
Old.setSubReg(AMDGPU::NoSubRegister);
712-
if (New->getReg().isPhysical())
713-
Old.substPhysReg(New->getReg(), *TRI);
714-
else
715-
Old.substVirtReg(New->getReg(), New->getSubReg(), *TRI);
712+
Old.substVirtReg(New->getReg(), New->getSubReg(), *TRI);
716713
Old.setIsUndef(New->isUndef());
717714
return true;
718715
}
@@ -1989,9 +1986,7 @@ bool SIFoldOperandsImpl::tryFoldFoldableCopy(
19891986
if (!FoldingImm && !OpToFold.isReg())
19901987
return false;
19911988

1992-
// Fold virtual registers and constant physical registers.
1993-
if (OpToFold.isReg() && OpToFold.getReg().isPhysical() &&
1994-
!TRI->isConstantPhysReg(OpToFold.getReg()))
1989+
if (OpToFold.isReg() && !OpToFold.getReg().isVirtual())
19951990
return false;
19961991

19971992
// Prevent folding operands backwards in the function. For example,

‎llvm/test/CodeGen/AMDGPU/addrspacecast-gas.ll

Lines changed: 30 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -9,14 +9,15 @@ target triple = "amdgcn-amd-amdhsa"
99
define amdgpu_kernel void @use_private_to_flat_addrspacecast(ptr addrspace(5) %ptr) {
1010
; GFX1250-SDAG-LABEL: use_private_to_flat_addrspacecast:
1111
; GFX1250-SDAG: ; %bb.0:
12-
; GFX1250-SDAG-NEXT: s_load_b32 s0, s[4:5], 0x24
12+
; GFX1250-SDAG-NEXT: s_load_b32 s2, s[4:5], 0x24
1313
; GFX1250-SDAG-NEXT: v_mbcnt_lo_u32_b32 v0, -1, 0
14+
; GFX1250-SDAG-NEXT: s_mov_b64 s[0:1], src_flat_scratch_base_lo
1415
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
1516
; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
16-
; GFX1250-SDAG-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_lshlrev_b32 v1, 20, v0
17-
; GFX1250-SDAG-NEXT: s_cmp_lg_u32 s0, -1
17+
; GFX1250-SDAG-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_lshlrev_b32 v1, 20, v0
18+
; GFX1250-SDAG-NEXT: s_cmp_lg_u32 s2, -1
1819
; GFX1250-SDAG-NEXT: s_cselect_b32 vcc_lo, -1, 0
19-
; GFX1250-SDAG-NEXT: v_add_nc_u64_e32 v[0:1], src_flat_scratch_base_lo, v[0:1]
20+
; GFX1250-SDAG-NEXT: v_add_nc_u64_e32 v[0:1], s[0:1], v[0:1]
2021
; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
2122
; GFX1250-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_cndmask_b32 v1, 0, v1
2223
; GFX1250-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc_lo
@@ -26,20 +27,20 @@ define amdgpu_kernel void @use_private_to_flat_addrspacecast(ptr addrspace(5) %p
2627
;
2728
; GFX1250-GISEL-LABEL: use_private_to_flat_addrspacecast:
2829
; GFX1250-GISEL: ; %bb.0:
29-
; GFX1250-GISEL-NEXT: s_load_b32 s0, s[4:5], 0x24
30-
; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[0:1], src_flat_scratch_base_lo
30+
; GFX1250-GISEL-NEXT: s_load_b32 s2, s[4:5], 0x24
31+
; GFX1250-GISEL-NEXT: s_mov_b64 s[0:1], src_flat_scratch_base_lo
3132
; GFX1250-GISEL-NEXT: v_mbcnt_lo_u32_b32 v2, -1, 0
33+
; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
3234
; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0
33-
; GFX1250-GISEL-NEXT: s_cmp_lg_u32 s0, -1
34-
; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
35-
; GFX1250-GISEL-NEXT: v_add_co_u32 v0, vcc_lo, s0, v0
35+
; GFX1250-GISEL-NEXT: s_cmp_lg_u32 s2, -1
36+
; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
37+
; GFX1250-GISEL-NEXT: v_add_co_u32 v0, vcc_lo, s2, v0
3638
; GFX1250-GISEL-NEXT: v_lshlrev_b32_e32 v2, 20, v2
37-
; GFX1250-GISEL-NEXT: s_cselect_b32 s1, 1, 0
38-
; GFX1250-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
39-
; GFX1250-GISEL-NEXT: s_and_b32 s1, 1, s1
39+
; GFX1250-GISEL-NEXT: s_cselect_b32 s0, 1, 0
40+
; GFX1250-GISEL-NEXT: s_and_b32 s0, 1, s0
41+
; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
4042
; GFX1250-GISEL-NEXT: v_add_co_ci_u32_e64 v1, null, v2, v1, vcc_lo
41-
; GFX1250-GISEL-NEXT: v_cmp_ne_u32_e64 vcc_lo, 0, s1
42-
; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
43+
; GFX1250-GISEL-NEXT: v_cmp_ne_u32_e64 vcc_lo, 0, s0
4344
; GFX1250-GISEL-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_cndmask_b32 v1, 0, v1
4445
; GFX1250-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc_lo
4546
; GFX1250-GISEL-NEXT: flat_store_b32 v[0:1], v2 scope:SCOPE_SYS
@@ -55,24 +56,27 @@ define amdgpu_kernel void @use_private_to_flat_addrspacecast_nonnull(ptr addrspa
5556
; GFX1250-SDAG: ; %bb.0:
5657
; GFX1250-SDAG-NEXT: s_load_b32 s0, s[4:5], 0x24
5758
; GFX1250-SDAG-NEXT: v_mbcnt_lo_u32_b32 v0, -1, 0
58-
; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
59+
; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
5960
; GFX1250-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 20, v0
6061
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
6162
; GFX1250-SDAG-NEXT: v_mov_b32_e32 v0, s0
62-
; GFX1250-SDAG-NEXT: v_add_nc_u64_e32 v[0:1], src_flat_scratch_base_lo, v[0:1]
63+
; GFX1250-SDAG-NEXT: s_mov_b64 s[0:1], src_flat_scratch_base_lo
64+
; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
65+
; GFX1250-SDAG-NEXT: v_add_nc_u64_e32 v[0:1], s[0:1], v[0:1]
6366
; GFX1250-SDAG-NEXT: flat_store_b32 v[0:1], v2 scope:SCOPE_SYS
6467
; GFX1250-SDAG-NEXT: s_wait_storecnt 0x0
6568
; GFX1250-SDAG-NEXT: s_endpgm
6669
;
6770
; GFX1250-GISEL-LABEL: use_private_to_flat_addrspacecast_nonnull:
6871
; GFX1250-GISEL: ; %bb.0:
69-
; GFX1250-GISEL-NEXT: s_load_b32 s0, s[4:5], 0x24
72+
; GFX1250-GISEL-NEXT: s_load_b32 s2, s[4:5], 0x24
73+
; GFX1250-GISEL-NEXT: s_mov_b64 s[0:1], src_flat_scratch_base_lo
7074
; GFX1250-GISEL-NEXT: v_mbcnt_lo_u32_b32 v2, -1, 0
71-
; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[0:1], src_flat_scratch_base_lo
75+
; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
7276
; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
7377
; GFX1250-GISEL-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_lshlrev_b32 v2, 20, v2
7478
; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0
75-
; GFX1250-GISEL-NEXT: v_add_co_u32 v0, vcc_lo, s0, v0
79+
; GFX1250-GISEL-NEXT: v_add_co_u32 v0, vcc_lo, s2, v0
7680
; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
7781
; GFX1250-GISEL-NEXT: v_add_co_ci_u32_e64 v1, null, v2, v1, vcc_lo
7882
; GFX1250-GISEL-NEXT: flat_store_b32 v[0:1], v3 scope:SCOPE_SYS
@@ -87,9 +91,10 @@ define amdgpu_kernel void @use_flat_to_private_addrspacecast(ptr %ptr) {
8791
; GFX1250-LABEL: use_flat_to_private_addrspacecast:
8892
; GFX1250: ; %bb.0:
8993
; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
94+
; GFX1250-NEXT: s_mov_b32 s2, src_flat_scratch_base_lo
9095
; GFX1250-NEXT: v_mov_b32_e32 v0, 0
9196
; GFX1250-NEXT: s_wait_kmcnt 0x0
92-
; GFX1250-NEXT: s_sub_co_i32 s2, s0, src_flat_scratch_base_lo
97+
; GFX1250-NEXT: s_sub_co_i32 s2, s0, s2
9398
; GFX1250-NEXT: s_cmp_lg_u64 s[0:1], 0
9499
; GFX1250-NEXT: s_cselect_b32 s0, s2, -1
95100
; GFX1250-NEXT: scratch_store_b32 off, v0, s0 scope:SCOPE_SYS
@@ -105,8 +110,9 @@ define amdgpu_kernel void @use_flat_to_private_addrspacecast_nonnull(ptr %ptr) {
105110
; GFX1250-SDAG: ; %bb.0:
106111
; GFX1250-SDAG-NEXT: s_load_b32 s0, s[4:5], 0x24
107112
; GFX1250-SDAG-NEXT: v_mov_b32_e32 v0, 0
113+
; GFX1250-SDAG-NEXT: s_mov_b32 s1, src_flat_scratch_base_lo
108114
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
109-
; GFX1250-SDAG-NEXT: s_sub_co_i32 s0, s0, src_flat_scratch_base_lo
115+
; GFX1250-SDAG-NEXT: s_sub_co_i32 s0, s0, s1
110116
; GFX1250-SDAG-NEXT: scratch_store_b32 off, v0, s0 scope:SCOPE_SYS
111117
; GFX1250-SDAG-NEXT: s_wait_storecnt 0x0
112118
; GFX1250-SDAG-NEXT: s_endpgm
@@ -116,7 +122,9 @@ define amdgpu_kernel void @use_flat_to_private_addrspacecast_nonnull(ptr %ptr) {
116122
; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
117123
; GFX1250-GISEL-NEXT: v_mov_b32_e32 v0, 0
118124
; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0
119-
; GFX1250-GISEL-NEXT: s_sub_co_i32 s0, s0, src_flat_scratch_base_lo
125+
; GFX1250-GISEL-NEXT: s_mov_b32 s1, src_flat_scratch_base_lo
126+
; GFX1250-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
127+
; GFX1250-GISEL-NEXT: s_sub_co_i32 s0, s0, s1
120128
; GFX1250-GISEL-NEXT: scratch_store_b32 off, v0, s0 scope:SCOPE_SYS
121129
; GFX1250-GISEL-NEXT: s_wait_storecnt 0x0
122130
; GFX1250-GISEL-NEXT: s_endpgm

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