@@ -577,7 +577,7 @@ static InstructionCost getHistogramCost(const IntrinsicCostAttributes &ICA) {
577577
578578InstructionCost
579579AArch64TTIImpl::getIntrinsicInstrCost (const IntrinsicCostAttributes &ICA,
580- TTI::TargetCostKind CostKind) {
580+ TTI::TargetCostKind CostKind) const {
581581 // The code-generator is currently not able to handle scalable vectors
582582 // of <vscale x 1 x eltty> yet, so return an invalid cost to avoid selecting
583583 // it. This change will be removed when code-generation for these types is
@@ -2806,7 +2806,7 @@ AArch64TTIImpl::getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const {
28062806
28072807bool AArch64TTIImpl::isWideningInstruction (Type *DstTy, unsigned Opcode,
28082808 ArrayRef<const Value *> Args,
2809- Type *SrcOverrideTy) {
2809+ Type *SrcOverrideTy) const {
28102810 // A helper that returns a vector type from the given type. The number of
28112811 // elements in type Ty determines the vector width.
28122812 auto toVectorTy = [&](Type *ArgTy) {
@@ -2903,7 +2903,7 @@ bool AArch64TTIImpl::isWideningInstruction(Type *DstTy, unsigned Opcode,
29032903// trunc i16 (lshr (add %x, %y), 1) -> i8
29042904//
29052905bool AArch64TTIImpl::isExtPartOfAvgExpr (const Instruction *ExtUser, Type *Dst,
2906- Type *Src) {
2906+ Type *Src) const {
29072907 // The source should be a legal vector type.
29082908 if (!Src->isVectorTy () || !TLI->isTypeLegal (TLI->getValueType (DL, Src)) ||
29092909 (Src->isScalableTy () && !ST->hasSVE2 ()))
@@ -2948,7 +2948,7 @@ InstructionCost AArch64TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
29482948 Type *Src,
29492949 TTI::CastContextHint CCH,
29502950 TTI::TargetCostKind CostKind,
2951- const Instruction *I) {
2951+ const Instruction *I) const {
29522952 int ISD = TLI->InstructionOpcodeToISD (Opcode);
29532953 assert (ISD && " Invalid opcode" );
29542954 // If the cast is observable, and it is used by a widening instruction (e.g.,
@@ -3619,7 +3619,7 @@ InstructionCost AArch64TTIImpl::getExtractWithExtendCost(unsigned Opcode,
36193619
36203620InstructionCost AArch64TTIImpl::getCFInstrCost (unsigned Opcode,
36213621 TTI::TargetCostKind CostKind,
3622- const Instruction *I) {
3622+ const Instruction *I) const {
36233623 if (CostKind != TTI::TCK_RecipThroughput)
36243624 return Opcode == Instruction::PHI ? 0 : 1 ;
36253625 assert (CostKind == TTI::TCK_RecipThroughput && " unexpected CostKind" );
@@ -3630,7 +3630,7 @@ InstructionCost AArch64TTIImpl::getCFInstrCost(unsigned Opcode,
36303630InstructionCost AArch64TTIImpl::getVectorInstrCostHelper (
36313631 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
36323632 bool HasRealUse, const Instruction *I, Value *Scalar,
3633- ArrayRef<std::tuple<Value *, User *, int >> ScalarUserAndIdx) {
3633+ ArrayRef<std::tuple<Value *, User *, int >> ScalarUserAndIdx) const {
36343634 assert (Val->isVectorTy () && " This must be a vector type" );
36353635
36363636 if (Index != -1U ) {
@@ -3802,7 +3802,7 @@ InstructionCost AArch64TTIImpl::getVectorInstrCostHelper(
38023802InstructionCost AArch64TTIImpl::getVectorInstrCost (unsigned Opcode, Type *Val,
38033803 TTI::TargetCostKind CostKind,
38043804 unsigned Index, Value *Op0,
3805- Value *Op1) {
3805+ Value *Op1) const {
38063806 bool HasRealUse =
38073807 Opcode == Instruction::InsertElement && Op0 && !isa<UndefValue>(Op0);
38083808 return getVectorInstrCostHelper (Opcode, Val, CostKind, Index, HasRealUse);
@@ -3826,7 +3826,7 @@ InstructionCost AArch64TTIImpl::getVectorInstrCost(const Instruction &I,
38263826
38273827InstructionCost AArch64TTIImpl::getScalarizationOverhead (
38283828 VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
3829- TTI::TargetCostKind CostKind, ArrayRef<Value *> VL) {
3829+ TTI::TargetCostKind CostKind, ArrayRef<Value *> VL) const {
38303830 if (isa<ScalableVectorType>(Ty))
38313831 return InstructionCost::getInvalid ();
38323832 if (Ty->getElementType ()->isFloatingPointTy ())
@@ -3840,8 +3840,7 @@ InstructionCost AArch64TTIImpl::getScalarizationOverhead(
38403840InstructionCost AArch64TTIImpl::getArithmeticInstrCost (
38413841 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
38423842 TTI::OperandValueInfo Op1Info, TTI::OperandValueInfo Op2Info,
3843- ArrayRef<const Value *> Args,
3844- const Instruction *CxtI) {
3843+ ArrayRef<const Value *> Args, const Instruction *CxtI) const {
38453844
38463845 // The code-generator is currently not able to handle scalable vectors
38473846 // of <vscale x 1 x eltty> yet, so return an invalid cost to avoid selecting
@@ -4171,7 +4170,7 @@ InstructionCost AArch64TTIImpl::getAddressComputationCost(Type *Ty,
41714170InstructionCost AArch64TTIImpl::getCmpSelInstrCost (
41724171 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
41734172 TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info,
4174- TTI::OperandValueInfo Op2Info, const Instruction *I) {
4173+ TTI::OperandValueInfo Op2Info, const Instruction *I) const {
41754174 // TODO: Handle other cost kinds.
41764175 if (CostKind != TTI::TCK_RecipThroughput)
41774176 return BaseT::getCmpSelInstrCost (Opcode, ValTy, CondTy, VecPred, CostKind,
@@ -4284,7 +4283,7 @@ bool AArch64TTIImpl::prefersVectorizedAddressing() const {
42844283InstructionCost
42854284AArch64TTIImpl::getMaskedMemoryOpCost (unsigned Opcode, Type *Src,
42864285 Align Alignment, unsigned AddressSpace,
4287- TTI::TargetCostKind CostKind) {
4286+ TTI::TargetCostKind CostKind) const {
42884287 if (useNeonVector (Src))
42894288 return BaseT::getMaskedMemoryOpCost (Opcode, Src, Alignment, AddressSpace,
42904289 CostKind);
@@ -4331,7 +4330,7 @@ static unsigned getSVEGatherScatterOverhead(unsigned Opcode,
43314330
43324331InstructionCost AArch64TTIImpl::getGatherScatterOpCost (
43334332 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask,
4334- Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) {
4333+ Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) const {
43354334 if (useNeonVector (DataTy) || !isLegalMaskedGatherScatter (DataTy))
43364335 return BaseT::getGatherScatterOpCost (Opcode, DataTy, Ptr, VariableMask,
43374336 Alignment, CostKind, I);
@@ -4371,7 +4370,7 @@ InstructionCost AArch64TTIImpl::getMemoryOpCost(unsigned Opcode, Type *Ty,
43714370 unsigned AddressSpace,
43724371 TTI::TargetCostKind CostKind,
43734372 TTI::OperandValueInfo OpInfo,
4374- const Instruction *I) {
4373+ const Instruction *I) const {
43754374 EVT VT = TLI->getValueType (DL, Ty, true );
43764375 // Type legalization can't handle structs
43774376 if (VT == MVT::Other)
@@ -4980,7 +4979,7 @@ bool AArch64TTIImpl::isLegalToVectorizeReduction(
49804979InstructionCost
49814980AArch64TTIImpl::getMinMaxReductionCost (Intrinsic::ID IID, VectorType *Ty,
49824981 FastMathFlags FMF,
4983- TTI::TargetCostKind CostKind) {
4982+ TTI::TargetCostKind CostKind) const {
49844983 // The code-generator is currently not able to handle scalable vectors
49854984 // of <vscale x 1 x eltty> yet, so return an invalid cost to avoid selecting
49864985 // it. This change will be removed when code-generation for these types is
@@ -5005,7 +5004,7 @@ AArch64TTIImpl::getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty,
50055004}
50065005
50075006InstructionCost AArch64TTIImpl::getArithmeticReductionCostSVE (
5008- unsigned Opcode, VectorType *ValTy, TTI::TargetCostKind CostKind) {
5007+ unsigned Opcode, VectorType *ValTy, TTI::TargetCostKind CostKind) const {
50095008 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost (ValTy);
50105009 InstructionCost LegalizationCost = 0 ;
50115010 if (LT.first > 1 ) {
@@ -5032,7 +5031,7 @@ InstructionCost AArch64TTIImpl::getArithmeticReductionCostSVE(
50325031InstructionCost
50335032AArch64TTIImpl::getArithmeticReductionCost (unsigned Opcode, VectorType *ValTy,
50345033 std::optional<FastMathFlags> FMF,
5035- TTI::TargetCostKind CostKind) {
5034+ TTI::TargetCostKind CostKind) const {
50365035 // The code-generator is currently not able to handle scalable vectors
50375036 // of <vscale x 1 x eltty> yet, so return an invalid cost to avoid selecting
50385037 // it. This change will be removed when code-generation for these types is
@@ -5207,8 +5206,9 @@ AArch64TTIImpl::getMulAccReductionCost(bool IsUnsigned, Type *ResTy,
52075206 return BaseT::getMulAccReductionCost (IsUnsigned, ResTy, VecTy, CostKind);
52085207}
52095208
5210- InstructionCost AArch64TTIImpl::getSpliceCost (VectorType *Tp, int Index,
5211- TTI::TargetCostKind CostKind) {
5209+ InstructionCost
5210+ AArch64TTIImpl::getSpliceCost (VectorType *Tp, int Index,
5211+ TTI::TargetCostKind CostKind) const {
52125212 static const CostTblEntry ShuffleTbl[] = {
52135213 { TTI::SK_Splice, MVT::nxv16i8, 1 },
52145214 { TTI::SK_Splice, MVT::nxv8i16, 1 },
@@ -5340,7 +5340,7 @@ InstructionCost AArch64TTIImpl::getPartialReductionCost(
53405340InstructionCost AArch64TTIImpl::getShuffleCost (
53415341 TTI::ShuffleKind Kind, VectorType *Tp, ArrayRef<int > Mask,
53425342 TTI::TargetCostKind CostKind, int Index, VectorType *SubTp,
5343- ArrayRef<const Value *> Args, const Instruction *CxtI) {
5343+ ArrayRef<const Value *> Args, const Instruction *CxtI) const {
53445344 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost (Tp);
53455345
53465346 // If we have a Mask, and the LT is being legalized somehow, split the Mask
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