@@ -30,9 +30,6 @@ using namespace llvm;
3030namespace {
3131
3232class AArch64AsmBackend : public MCAsmBackend {
33- static const unsigned PCRelFlagVal =
34- MCFixupKindInfo::FKF_IsAlignedDownTo32Bits;
35-
3633protected:
3734 Triple TheTriple;
3835
@@ -51,22 +48,22 @@ class AArch64AsmBackend : public MCAsmBackend {
5148 // in AArch64FixupKinds.h.
5249 //
5350 // Name Offset (bits) Size (bits) Flags
54- {" fixup_aarch64_pcrel_adr_imm21" , 0 , 32 , PCRelFlagVal },
55- {" fixup_aarch64_pcrel_adrp_imm21" , 0 , 32 , PCRelFlagVal },
51+ {" fixup_aarch64_pcrel_adr_imm21" , 0 , 32 , 0 },
52+ {" fixup_aarch64_pcrel_adrp_imm21" , 0 , 32 , 0 },
5653 {" fixup_aarch64_add_imm12" , 10 , 12 , 0 },
5754 {" fixup_aarch64_ldst_imm12_scale1" , 10 , 12 , 0 },
5855 {" fixup_aarch64_ldst_imm12_scale2" , 10 , 12 , 0 },
5956 {" fixup_aarch64_ldst_imm12_scale4" , 10 , 12 , 0 },
6057 {" fixup_aarch64_ldst_imm12_scale8" , 10 , 12 , 0 },
6158 {" fixup_aarch64_ldst_imm12_scale16" , 10 , 12 , 0 },
62- {" fixup_aarch64_ldr_pcrel_imm19" , 5 , 19 , PCRelFlagVal },
59+ {" fixup_aarch64_ldr_pcrel_imm19" , 5 , 19 , 0 },
6360 {" fixup_aarch64_movw" , 5 , 16 , 0 },
64- {" fixup_aarch64_pcrel_branch9" , 5 , 9 , PCRelFlagVal },
65- {" fixup_aarch64_pcrel_branch14" , 5 , 14 , PCRelFlagVal },
66- {" fixup_aarch64_pcrel_branch16" , 5 , 16 , PCRelFlagVal },
67- {" fixup_aarch64_pcrel_branch19" , 5 , 19 , PCRelFlagVal },
68- {" fixup_aarch64_pcrel_branch26" , 0 , 26 , PCRelFlagVal },
69- {" fixup_aarch64_pcrel_call26" , 0 , 26 , PCRelFlagVal }};
61+ {" fixup_aarch64_pcrel_branch9" , 5 , 9 , 0 },
62+ {" fixup_aarch64_pcrel_branch14" , 5 , 14 , 0 },
63+ {" fixup_aarch64_pcrel_branch16" , 5 , 16 , 0 },
64+ {" fixup_aarch64_pcrel_branch19" , 5 , 19 , 0 },
65+ {" fixup_aarch64_pcrel_branch26" , 0 , 26 , 0 },
66+ {" fixup_aarch64_pcrel_call26" , 0 , 26 , 0 }};
7067
7168 // Fixup kinds from raw relocation types and .reloc directives force
7269 // relocations and do not need these fields.
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