[PPC][BOLT] Compute PPC64 ELFv2 TOC base as .got + 0x8000

According to the ELFv2 ABI, the TOC base register (r2) point to the address .got + 0x8000. This patch computes the correct TOC base when processing PPC64 binaries and uses it to anchor TOC-relative relocations.

This resolves warnings such as:
"ignoring symbol .TOC. at 0x10027f00, which lies outside .got"

Author: kostasalv

bolt/include/bolt/Rewrite/RewriteInstance.h

@@ -517,6 +517,14 @@ class RewriteInstance {
   /// Flag indicating runtime library linking just started.
   bool StartLinkingRuntimeLib{false};
 
+  /// PPC64 TOC (Table of Contents) base address used for resolving function and
+  /// data references on PPC64 binaries. Set when processing PPC64 binaries with
+  /// a TOC base present.
+  uint64_t PPC64TOCBase = 0;
+
+  /// Flag indicating whether PPC64TOCBase has been set and is valid for use.
+  bool HavePPC64TOCBase = false;
+
   /// Information on special Procedure Linkage Table sections. There are
   /// multiple variants generated by different linkers.
   struct PLTSectionInfo {

bolt/lib/Rewrite/RewriteInstance.cpp

@@ -743,6 +743,19 @@ Error RewriteInstance::run() {
   adjustCommandLineOptions();
   discoverFileObjects();
 
+  if (BC->isPPC64()) {
+    if (const auto *G = BC->getUniqueSectionByName(".got")) {
+      PPC64TOCBase = G->getAddress() + 0x8000; // ELFv2 ABI
+      HavePPC64TOCBase = true;
+      if (opts::Verbosity >= 1)
+        BC->outs() << "BOLT-INFO: PPC64 TOC base: 0x"
+                   << Twine::utohexstr(PPC64TOCBase) << "\n";
+    } else if (opts::Verbosity >= 1) {
+      BC->errs()
+          << "BOLT-WARNING: .got not found; PPC64 TOC base unavailable\n";
+    }
+  }
+
   if (opts::Instrument && !BC->IsStaticExecutable)
     if (Error E = discoverRtFiniAddress())
       return E;
@@ -2415,6 +2428,22 @@ bool RewriteInstance::analyzeRelocation(
         SkipVerification |= (*TypeOrErr == SymbolRef::ST_Other);
         IsSectionRelocation = (*TypeOrErr == SymbolRef::ST_Debug);
       }
+
+      if (HavePPC64TOCBase) {
+        switch (RType) {
+        case ELF::R_PPC64_TOC16:
+        case ELF::R_PPC64_TOC16_LO:
+        case ELF::R_PPC64_TOC16_HI:
+        case ELF::R_PPC64_TOC16_HA:
+        case ELF::R_PPC64_TOC16_DS:
+        case ELF::R_PPC64_TOC16_LO_DS:
+          SymbolAddress = PPC64TOCBase;
+          break;
+        default:
+          break;
+        }
+      }
+
     } else {
       // --- Original fast path for other arches ---
       SymbolName = std::string(cantFail(Symbol.getName()));

bolt/lib/Target/PowerPC/PPCMCPlusBuilder.cpp

@@ -406,6 +406,24 @@ PPCMCPlusBuilder::createRelocation(const MCFixup &Fixup,
     return R;
   }
 
+  if (L.find("toc16_lo_ds") != std::string::npos) {
+    // TOC16_LO_DS can be optimized to R_GOTREL if tocOptimize is on
+    R.Type = ELF::R_PPC64_TOC16_LO_DS;
+    return R;
+  }
+  if (L.find("toc16_ds") != std::string::npos) {
+    R.Type = ELF::R_PPC64_TOC16_DS;
+    return R;
+  }
+  if (L.find("addr16_lo_ds") != std::string::npos) {
+    R.Type = ELF::R_PPC64_ADDR16_LO_DS;
+    return R;
+  }
+  if (L.find("addr16_ds") != std::string::npos) {
+    R.Type = ELF::R_PPC64_ADDR16_DS;
+    return R;
+  }
+
   // --- Fallback heuristic: use PCRel + bit-size ---
   if (Fixup.isPCRel()) {
     switch (FKI.TargetSize) {