comments

Author: Pierre-vh

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

@@ -17646,10 +17646,9 @@ atomicSupportedIfLegalIntType(const AtomicRMWInst *RMW) {
 
 /// Return if a flat address space atomicrmw can access private memory.
 static bool flatInstrMayAccessPrivate(const Instruction *I) {
-  const MDNode *NoaliasAddrSpaceMD =
-      I->getMetadata(LLVMContext::MD_noalias_addrspace);
-  return !AMDGPU::hasValueInRange(NoaliasAddrSpaceMD,
-                                  AMDGPUAS::PRIVATE_ADDRESS);
+  const MDNode *MD = I->getMetadata(LLVMContext::MD_noalias_addrspace);
+  return !(MD &&
+           AMDGPU::hasValueInRangeLikeMetadata(*MD, AMDGPUAS::PRIVATE_ADDRESS));
 }
 
 TargetLowering::AtomicExpansionKind

llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

@@ -4269,9 +4269,11 @@ bool SIInstrInfo::mayAccessScratchThroughFlat(const MachineInstr &MI) const {
   // See if any memory operand specifies an address space that involves scratch.
   return any_of(MI.memoperands(), [](const MachineMemOperand *Memop) {
     unsigned AS = Memop->getAddrSpace();
-    if (AS == AMDGPUAS::FLAT_ADDRESS)
-      return !AMDGPU::hasValueInRange(Memop->getAAInfo().NoAliasAddrSpace,
-                                      AMDGPUAS::PRIVATE_ADDRESS);
+    if (AS == AMDGPUAS::FLAT_ADDRESS) {
+      const MDNode *MD = Memop->getAAInfo().NoAliasAddrSpace;
+      return !(MD && AMDGPU::hasValueInRangeLikeMetadata(
+                         *MD, AMDGPUAS::PRIVATE_ADDRESS));
+    }
     return AS == AMDGPUAS::PRIVATE_ADDRESS;
   });
 }

llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp

@@ -1667,14 +1667,11 @@ getIntegerVecAttribute(const Function &F, StringRef Name, unsigned Size) {
   return Vals;
 }
 
-bool hasValueInRange(const MDNode *MD, unsigned Val) {
-  if (!MD)
-    return false;
-
-  assert((MD->getNumOperands() % 2 == 0) && "invalid number of operands!");
-  for (unsigned I = 0, E = MD->getNumOperands() / 2; I != E; ++I) {
-    auto *Low = mdconst::extract<ConstantInt>(MD->getOperand(2 * I + 0));
-    auto *High = mdconst::extract<ConstantInt>(MD->getOperand(2 * I + 1));
+bool hasValueInRangeLikeMetadata(const MDNode &MD, int64_t Val) {
+  assert((MD.getNumOperands() % 2 == 0) && "invalid number of operands!");
+  for (unsigned I = 0, E = MD.getNumOperands() / 2; I != E; ++I) {
+    auto *Low = mdconst::extract<ConstantInt>(MD.getOperand(2 * I + 0));
+    auto *High = mdconst::extract<ConstantInt>(MD.getOperand(2 * I + 1));
     assert(Low->getValue().ult(High->getValue()) && "invalid range metadata!");
     if (Low->getValue().ule(Val) && High->getValue().ugt(Val))
       return true;

llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h

@@ -1066,8 +1066,7 @@ std::optional<SmallVector<unsigned>>
 getIntegerVecAttribute(const Function &F, StringRef Name, unsigned Size);
 
 /// Checks if \p Val is inside \p MD, a !range-like metadata.
-/// Returns false if \p MD is null.
-bool hasValueInRange(const MDNode *MD, unsigned Val);
+bool hasValueInRangeLikeMetadata(const MDNode &MD, int64_t Val);
 
 /// Represents the counter values to wait for in an s_waitcnt instruction.
 ///