Instr eval based on reg width and attempt to pass tests

Author: arjunUpatel

llvm/include/llvm/MC/MCInstrAnalysis.h

@@ -181,9 +181,11 @@ class MCInstrAnalysis {
   evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
                  uint64_t &Target) const;
 
+  /// Given an instruction that accesses a menory address, try to compute
+  /// the target address. Return true success, and the address in Target.
   virtual bool
   evaluateInstruction(const MCInst &Inst, uint64_t Addr, uint64_t Size,
-                      uint64_t &Target) const;
+                      uint64_t &Target, int ArchRegWidth) const;
 
   /// Given an instruction tries to get the address of a memory operand. Returns
   /// the address on success.

llvm/lib/MC/MCInstrAnalysis.cpp

@@ -32,7 +32,7 @@ bool MCInstrAnalysis::evaluateBranch(const MCInst & /*Inst*/, uint64_t /*Addr*/,
 
 bool MCInstrAnalysis::evaluateInstruction(const MCInst &Inst,
                                           uint64_t Addr, uint64_t Size,
-                                          uint64_t &Target) const {
+                                          uint64_t &Target, int ArchRegWidth) const {
   return false;
 }
 

llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp

@@ -247,15 +247,13 @@ class RISCVMCInstrAnalysis : public MCInstrAnalysis {
   }
 
   bool evaluateInstruction(const MCInst &Inst, uint64_t Addr, uint64_t Size,
-                           uint64_t &Target) const override {
+                           uint64_t &Target, int ArchRegWidth) const override {
     switch(Inst.getOpcode()) {
       default:
         return false;
       case RISCV::ADDI: {
         if (auto TargetRegState = getGPRState(Inst.getOperand(1).getReg())) {
-          // TODO: Figure out ways to find the actual value of XLEN during analysis
-          int XLEN = 32;
-          uint64_t Mask = ~((uint64_t)0) >> (64 - XLEN);
+          uint64_t Mask = ~((uint64_t)0) >> (64 - ArchRegWidth);
           Target = *TargetRegState + SignExtend64<12>(Inst.getOperand(2).getImm());
           Target &= Mask;
           return true;

llvm/tools/llvm-objdump/llvm-objdump.cpp

@@ -2323,8 +2323,9 @@ disassembleObject(ObjectFile &Obj, const ObjectFile &DbgObj,
           if (Disassembled && DT->InstrAnalysis) {
             llvm::raw_ostream *TargetOS = &FOS;
             uint64_t Target;
+            int TargetArchBitWidth = DT->SubtargetInfo->getTargetTriple().getArchPointerBitWidth();
             bool PrintTarget = DT->InstrAnalysis->evaluateBranch(Inst, SectionAddr + Index, Size, Target) || 
-                               DT->InstrAnalysis->evaluateInstruction(Inst, SectionAddr + Index, Size, Target);
+                               DT->InstrAnalysis->evaluateInstruction(Inst, SectionAddr + Index, Size, Target, TargetArchBitWidth);
             if (!PrintTarget) {
               if (std::optional<uint64_t> MaybeTarget =
                       DT->InstrAnalysis->evaluateMemoryOperandAddress(
@@ -2353,27 +2354,37 @@ disassembleObject(ObjectFile &Obj, const ObjectFile &DbgObj,
               // N.B. Except for XCOFF, we don't walk the relocations in the
               // relocatable case yet.
               std::vector<const SectionSymbolsTy *> TargetSectionSymbols;
+              bool AbsoluteFirst = false;
               if (!Obj.isRelocatableObject()) {
                 auto It = llvm::partition_point(
                     SectionAddresses,
                     [=](const std::pair<uint64_t, SectionRef> &O) {
                       return O.first <= Target;
                     });
-                uint64_t TargetSecAddr = 0;
+                uint64_t TargetSecAddr = It == SectionAddresses.end() ? It->first : 0;
+                bool FoundSymbols = false;
+                // missing case where begin == end as in this case, we are to return 0
                 while (It != SectionAddresses.begin()) {
                   --It;
-                  if (TargetSecAddr == 0)
-                    TargetSecAddr = It->first;
-                  if (It->first != TargetSecAddr)
-                    break;
+                  if (It->first != TargetSecAddr) {
+                    if (FoundSymbols)
+                      break;
+                    else {
+                      TargetSecAddr = It->first;
+                      AbsoluteFirst = true;
+                    }
+                  }
                   TargetSectionSymbols.push_back(&AllSymbols[It->second]);
-                  if (AllSymbols[It->second].empty())
-                    TargetSecAddr = 0;
+                  if (!AllSymbols[It->second].empty())
+                    FoundSymbols = true;
                 }
               } else {
                 TargetSectionSymbols.push_back(&Symbols);
               }
-              TargetSectionSymbols.push_back(&AbsoluteSymbols);
+              if (AbsoluteFirst)
+                TargetSectionSymbols.insert(TargetSectionSymbols.begin(), &AbsoluteSymbols);
+              else
+                TargetSectionSymbols.push_back(&AbsoluteSymbols);
 
               // Find the last symbol in the first candidate section whose
               // offset is less than or equal to the target. If there are no