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goldsteinngoldsteinn
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[X86] Improve transform for add-like nodes to add
Remove bespoke logic and use `isADDLike`.
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6 files changed

+81
-54
lines changed

6 files changed

+81
-54
lines changed

‎llvm/lib/Target/X86/X86InstrCompiler.td‎

Lines changed: 26 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1560,21 +1560,40 @@ let Predicates = [HasNDD] in {
15601560
}
15611561

15621562
// Depositing value to 8/16 bit subreg:
1563-
def : Pat<(or (and GR64:$dst, -256),
1563+
def : Pat<(or (and GR64:$dst, -256),
15641564
(i64 (zextloadi8 addr:$src))),
1565-
(INSERT_SUBREG (i64 (COPY $dst)), (MOV8rm i8mem:$src), sub_8bit)>;
1565+
(INSERT_SUBREG (i64 (COPY $dst)), (MOV8rm i8mem:$src), sub_8bit)>;
15661566

1567-
def : Pat<(or (and GR32:$dst, -256),
1567+
def : Pat<(or (and GR32:$dst, -256),
15681568
(i32 (zextloadi8 addr:$src))),
1569-
(INSERT_SUBREG (i32 (COPY $dst)), (MOV8rm i8mem:$src), sub_8bit)>;
1569+
(INSERT_SUBREG (i32 (COPY $dst)), (MOV8rm i8mem:$src), sub_8bit)>;
15701570

1571-
def : Pat<(or (and GR64:$dst, -65536),
1571+
def : Pat<(or (and GR64:$dst, -65536),
15721572
(i64 (zextloadi16 addr:$src))),
15731573
(INSERT_SUBREG (i64 (COPY $dst)), (MOV16rm i16mem:$src), sub_16bit)>;
15741574

1575-
def : Pat<(or (and GR32:$dst, -65536),
1575+
def : Pat<(or (and GR32:$dst, -65536),
15761576
(i32 (zextloadi16 addr:$src))),
1577-
(INSERT_SUBREG (i32 (COPY $dst)), (MOV16rm i16mem:$src), sub_16bit)>;
1577+
(INSERT_SUBREG (i32 (COPY $dst)), (MOV16rm i16mem:$src), sub_16bit)>;
1578+
1579+
// Same pattern as above but supporting `add` as the join
1580+
// operator. Need to support `add` as well, as we can convert `or` ->
1581+
// `add` when the `or` is `disjoint` (as in this patterns case).
1582+
def : Pat<(add (and GR64:$dst, -256),
1583+
(i64 (zextloadi8 addr:$src))),
1584+
(INSERT_SUBREG (i64 (COPY $dst)), (MOV8rm i8mem:$src), sub_8bit)>;
1585+
1586+
def : Pat<(add (and GR32:$dst, -256),
1587+
(i32 (zextloadi8 addr:$src))),
1588+
(INSERT_SUBREG (i32 (COPY $dst)), (MOV8rm i8mem:$src), sub_8bit)>;
1589+
1590+
def : Pat<(add (and GR64:$dst, -65536),
1591+
(i64 (zextloadi16 addr:$src))),
1592+
(INSERT_SUBREG (i64 (COPY $dst)), (MOV16rm i16mem:$src), sub_16bit)>;
1593+
1594+
def : Pat<(add (and GR32:$dst, -65536),
1595+
(i32 (zextloadi16 addr:$src))),
1596+
(INSERT_SUBREG (i32 (COPY $dst)), (MOV16rm i16mem:$src), sub_16bit)>;
15781597

15791598
// To avoid needing to materialize an immediate in a register, use a 32-bit and
15801599
// with implicit zero-extension instead of a 64-bit and if the immediate has at

‎llvm/lib/Target/X86/X86InstrFragments.td‎

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -676,12 +676,7 @@ def def32 : PatLeaf<(i32 GR32:$src), [{
676676

677677
// Treat an 'or' node is as an 'add' if the or'ed bits are known to be zero.
678678
def or_is_add : PatFrag<(ops node:$lhs, node:$rhs), (or node:$lhs, node:$rhs),[{
679-
if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N->getOperand(1)))
680-
return CurDAG->MaskedValueIsZero(N->getOperand(0), CN->getAPIntValue());
681-
682-
KnownBits Known0 = CurDAG->computeKnownBits(N->getOperand(0), 0);
683-
KnownBits Known1 = CurDAG->computeKnownBits(N->getOperand(1), 0);
684-
return (~Known0.Zero & ~Known1.Zero) == 0;
679+
return N->getOpcode() == ISD::OR && CurDAG->isADDLike(SDValue(N, 0));
685680
}]>;
686681

687682
def shiftMask8 : PatFrag<(ops node:$lhs), (and node:$lhs, imm), [{

‎llvm/test/CodeGen/X86/bitselect.ll‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -45,11 +45,12 @@ define i16 @bitselect_i16(i16 %a, i16 %b, i16 %m) nounwind {
4545
;
4646
; X64-NOBMI-LABEL: bitselect_i16:
4747
; X64-NOBMI: # %bb.0:
48-
; X64-NOBMI-NEXT: movl %edx, %eax
48+
; X64-NOBMI-NEXT: # kill: def $edx killed $edx def $rdx
49+
; X64-NOBMI-NEXT: # kill: def $esi killed $esi def $rsi
4950
; X64-NOBMI-NEXT: andl %edx, %esi
50-
; X64-NOBMI-NEXT: notl %eax
51-
; X64-NOBMI-NEXT: andl %edi, %eax
52-
; X64-NOBMI-NEXT: orl %esi, %eax
51+
; X64-NOBMI-NEXT: notl %edx
52+
; X64-NOBMI-NEXT: andl %edi, %edx
53+
; X64-NOBMI-NEXT: leal (%rdx,%rsi), %eax
5354
; X64-NOBMI-NEXT: # kill: def $ax killed $ax killed $eax
5455
; X64-NOBMI-NEXT: retq
5556
;

‎llvm/test/CodeGen/X86/fold-masked-merge.ll‎

Lines changed: 21 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -30,11 +30,12 @@ define i32 @masked_merge0(i32 %a0, i32 %a1, i32 %a2) {
3030
define i16 @masked_merge1(i16 %a0, i16 %a1, i16 %a2) {
3131
; NOBMI-LABEL: masked_merge1:
3232
; NOBMI: # %bb.0:
33-
; NOBMI-NEXT: movl %edi, %eax
33+
; NOBMI-NEXT: # kill: def $esi killed $esi def $rsi
34+
; NOBMI-NEXT: # kill: def $edi killed $edi def $rdi
3435
; NOBMI-NEXT: andl %edi, %esi
35-
; NOBMI-NEXT: notl %eax
36-
; NOBMI-NEXT: andl %edx, %eax
37-
; NOBMI-NEXT: orl %esi, %eax
36+
; NOBMI-NEXT: notl %edi
37+
; NOBMI-NEXT: andl %edx, %edi
38+
; NOBMI-NEXT: leal (%rdi,%rsi), %eax
3839
; NOBMI-NEXT: # kill: def $ax killed $ax killed $eax
3940
; NOBMI-NEXT: retq
4041
;
@@ -203,11 +204,12 @@ define i32 @not_a_masked_merge4(i32 %a0, i32 %a1, i32 %a2) {
203204
define i32 @masked_merge_no_transform0(i32 %a0, i32 %a1, i32 %a2, ptr %p1) {
204205
; NOBMI-LABEL: masked_merge_no_transform0:
205206
; NOBMI: # %bb.0:
206-
; NOBMI-NEXT: movl %edi, %eax
207+
; NOBMI-NEXT: # kill: def $esi killed $esi def $rsi
208+
; NOBMI-NEXT: # kill: def $edi killed $edi def $rdi
207209
; NOBMI-NEXT: andl %edi, %esi
208-
; NOBMI-NEXT: notl %eax
209-
; NOBMI-NEXT: andl %edx, %eax
210-
; NOBMI-NEXT: orl %esi, %eax
210+
; NOBMI-NEXT: notl %edi
211+
; NOBMI-NEXT: andl %edx, %edi
212+
; NOBMI-NEXT: leal (%rdi,%rsi), %eax
211213
; NOBMI-NEXT: movl %esi, (%rcx)
212214
; NOBMI-NEXT: retq
213215
;
@@ -230,11 +232,12 @@ define i32 @masked_merge_no_transform0(i32 %a0, i32 %a1, i32 %a2, ptr %p1) {
230232
define i32 @masked_merge_no_transform1(i32 %a0, i32 %a1, i32 %a2, ptr %p1) {
231233
; NOBMI-LABEL: masked_merge_no_transform1:
232234
; NOBMI: # %bb.0:
233-
; NOBMI-NEXT: movl %edx, %eax
235+
; NOBMI-NEXT: # kill: def $edx killed $edx def $rdx
236+
; NOBMI-NEXT: # kill: def $esi killed $esi def $rsi
234237
; NOBMI-NEXT: andl %edi, %esi
235238
; NOBMI-NEXT: notl %edi
236-
; NOBMI-NEXT: andl %edi, %eax
237-
; NOBMI-NEXT: orl %esi, %eax
239+
; NOBMI-NEXT: andl %edi, %edx
240+
; NOBMI-NEXT: leal (%rdx,%rsi), %eax
238241
; NOBMI-NEXT: movl %edi, (%rcx)
239242
; NOBMI-NEXT: retq
240243
;
@@ -258,20 +261,21 @@ define i32 @masked_merge_no_transform1(i32 %a0, i32 %a1, i32 %a2, ptr %p1) {
258261
define i32 @masked_merge_no_transform2(i32 %a0, i32 %a1, i32 %a2, ptr %p1) {
259262
; NOBMI-LABEL: masked_merge_no_transform2:
260263
; NOBMI: # %bb.0:
261-
; NOBMI-NEXT: movl %esi, %eax
262-
; NOBMI-NEXT: andl %edi, %eax
264+
; NOBMI-NEXT: # kill: def $esi killed $esi def $rsi
265+
; NOBMI-NEXT: # kill: def $edi killed $edi def $rdi
266+
; NOBMI-NEXT: andl %edi, %esi
263267
; NOBMI-NEXT: notl %edi
264268
; NOBMI-NEXT: andl %edx, %edi
265-
; NOBMI-NEXT: orl %edi, %eax
269+
; NOBMI-NEXT: leal (%rsi,%rdi), %eax
266270
; NOBMI-NEXT: movl %edi, (%rcx)
267271
; NOBMI-NEXT: retq
268272
;
269273
; BMI-LABEL: masked_merge_no_transform2:
270274
; BMI: # %bb.0:
271-
; BMI-NEXT: movl %esi, %eax
272-
; BMI-NEXT: andl %edi, %eax
275+
; BMI-NEXT: # kill: def $esi killed $esi def $rsi
276+
; BMI-NEXT: andl %edi, %esi
273277
; BMI-NEXT: andnl %edx, %edi, %edx
274-
; BMI-NEXT: orl %edx, %eax
278+
; BMI-NEXT: leal (%rsi,%rdx), %eax
275279
; BMI-NEXT: movl %edx, (%rcx)
276280
; BMI-NEXT: retq
277281
%and0 = and i32 %a0, %a1

‎llvm/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -33,11 +33,12 @@ define i8 @out8(i8 %x, i8 %y, i8 %mask) {
3333
define i16 @out16(i16 %x, i16 %y, i16 %mask) {
3434
; CHECK-NOBMI-LABEL: out16:
3535
; CHECK-NOBMI: # %bb.0:
36-
; CHECK-NOBMI-NEXT: movl %edx, %eax
36+
; CHECK-NOBMI-NEXT: # kill: def $edx killed $edx def $rdx
37+
; CHECK-NOBMI-NEXT: # kill: def $edi killed $edi def $rdi
3738
; CHECK-NOBMI-NEXT: andl %edx, %edi
38-
; CHECK-NOBMI-NEXT: notl %eax
39-
; CHECK-NOBMI-NEXT: andl %esi, %eax
40-
; CHECK-NOBMI-NEXT: orl %edi, %eax
39+
; CHECK-NOBMI-NEXT: notl %edx
40+
; CHECK-NOBMI-NEXT: andl %esi, %edx
41+
; CHECK-NOBMI-NEXT: leal (%rdx,%rdi), %eax
4142
; CHECK-NOBMI-NEXT: # kill: def $ax killed $ax killed $eax
4243
; CHECK-NOBMI-NEXT: retq
4344
;

‎llvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll‎

Lines changed: 23 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -86,11 +86,12 @@ define <2 x i8> @out_v2i8(<2 x i8> %x, <2 x i8> %y, <2 x i8> %mask) nounwind {
8686
define <1 x i16> @out_v1i16(<1 x i16> %x, <1 x i16> %y, <1 x i16> %mask) nounwind {
8787
; CHECK-LABEL: out_v1i16:
8888
; CHECK: # %bb.0:
89-
; CHECK-NEXT: movl %edx, %eax
89+
; CHECK-NEXT: # kill: def $edx killed $edx def $rdx
90+
; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
9091
; CHECK-NEXT: andl %edx, %edi
91-
; CHECK-NEXT: notl %eax
92-
; CHECK-NEXT: andl %esi, %eax
93-
; CHECK-NEXT: orl %edi, %eax
92+
; CHECK-NEXT: notl %edx
93+
; CHECK-NEXT: andl %esi, %edx
94+
; CHECK-NEXT: leal (%rdx,%rdi), %eax
9495
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
9596
; CHECK-NEXT: retq
9697
%mx = and <1 x i16> %x, %mask
@@ -235,32 +236,38 @@ define <4 x i8> @out_v4i8_undef(<4 x i8> %x, <4 x i8> %y, <4 x i8> %mask) nounwi
235236
define <2 x i16> @out_v2i16(<2 x i16> %x, <2 x i16> %y, <2 x i16> %mask) nounwind {
236237
; CHECK-BASELINE-LABEL: out_v2i16:
237238
; CHECK-BASELINE: # %bb.0:
238-
; CHECK-BASELINE-NEXT: movl %r8d, %eax
239+
; CHECK-BASELINE-NEXT: # kill: def $r9d killed $r9d def $r9
240+
; CHECK-BASELINE-NEXT: # kill: def $r8d killed $r8d def $r8
241+
; CHECK-BASELINE-NEXT: # kill: def $esi killed $esi def $rsi
242+
; CHECK-BASELINE-NEXT: # kill: def $edi killed $edi def $rdi
239243
; CHECK-BASELINE-NEXT: andl %r9d, %esi
240244
; CHECK-BASELINE-NEXT: andl %r8d, %edi
241-
; CHECK-BASELINE-NEXT: notl %eax
245+
; CHECK-BASELINE-NEXT: notl %r8d
242246
; CHECK-BASELINE-NEXT: notl %r9d
243247
; CHECK-BASELINE-NEXT: andl %ecx, %r9d
244-
; CHECK-BASELINE-NEXT: orl %esi, %r9d
245-
; CHECK-BASELINE-NEXT: andl %edx, %eax
246-
; CHECK-BASELINE-NEXT: orl %edi, %eax
248+
; CHECK-BASELINE-NEXT: leal (%r9,%rsi), %ecx
249+
; CHECK-BASELINE-NEXT: andl %edx, %r8d
250+
; CHECK-BASELINE-NEXT: leal (%r8,%rdi), %eax
247251
; CHECK-BASELINE-NEXT: # kill: def $ax killed $ax killed $eax
248-
; CHECK-BASELINE-NEXT: movl %r9d, %edx
252+
; CHECK-BASELINE-NEXT: movl %ecx, %edx
249253
; CHECK-BASELINE-NEXT: retq
250254
;
251255
; CHECK-SSE1-LABEL: out_v2i16:
252256
; CHECK-SSE1: # %bb.0:
253-
; CHECK-SSE1-NEXT: movl %r8d, %eax
257+
; CHECK-SSE1-NEXT: # kill: def $r9d killed $r9d def $r9
258+
; CHECK-SSE1-NEXT: # kill: def $r8d killed $r8d def $r8
259+
; CHECK-SSE1-NEXT: # kill: def $esi killed $esi def $rsi
260+
; CHECK-SSE1-NEXT: # kill: def $edi killed $edi def $rdi
254261
; CHECK-SSE1-NEXT: andl %r9d, %esi
255262
; CHECK-SSE1-NEXT: andl %r8d, %edi
256-
; CHECK-SSE1-NEXT: notl %eax
263+
; CHECK-SSE1-NEXT: notl %r8d
257264
; CHECK-SSE1-NEXT: notl %r9d
258265
; CHECK-SSE1-NEXT: andl %ecx, %r9d
259-
; CHECK-SSE1-NEXT: orl %esi, %r9d
260-
; CHECK-SSE1-NEXT: andl %edx, %eax
261-
; CHECK-SSE1-NEXT: orl %edi, %eax
266+
; CHECK-SSE1-NEXT: leal (%r9,%rsi), %ecx
267+
; CHECK-SSE1-NEXT: andl %edx, %r8d
268+
; CHECK-SSE1-NEXT: leal (%r8,%rdi), %eax
262269
; CHECK-SSE1-NEXT: # kill: def $ax killed $ax killed $eax
263-
; CHECK-SSE1-NEXT: movl %r9d, %edx
270+
; CHECK-SSE1-NEXT: movl %ecx, %edx
264271
; CHECK-SSE1-NEXT: retq
265272
;
266273
; CHECK-SSE2-LABEL: out_v2i16:

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