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llvm/lib/CodeGen/LiveIntervals.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -665,10 +665,10 @@ void LiveIntervals::extendToIndices(LiveRange &LR,
665665
void LiveIntervals::pruneValue(LiveRange &LR, SlotIndex Kill,
666666
SmallVectorImpl<SlotIndex> *EndPoints) {
667667
LiveQueryResult LRQ = LR.Query(Kill);
668-
// LR may have liveness reachable from early clobber killer, which may be
668+
// LR may have liveness reachable from early clobber slot, which may be
669669
// only live-in instead of live-out of the instruction.
670670
// For example, LR =[1r, 3r), Kill = 3e, we have to prune [3e, 3r) of LR.
671-
VNInfo *VNI = Kill.isEarlyClobber() ? LRQ.valueIn() : LRQ.valueOutOrDead();
671+
VNInfo *VNI = LRQ.valueOutOrDead() ? LRQ.valueOutOrDead() : LRQ.valueIn();
672672
if (!VNI)
673673
return;
674674

llvm/test/CodeGen/RISCV/rvv/pr134424.ll

Lines changed: 15 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
22
; RUN: llc -O1 -mtriple=riscv64 -mattr=+v < %s | FileCheck %s
33

4-
define i32 @main(i64 %0, i32 %a.promoted49.i, i1 %tobool.not.us.i.4, i1 %tobool.not.us.i.1.4, i1 %tobool.not.us.i.2.4) {
4+
define i32 @main(i64 %input_value, i32 %base_value, i1 %cond_flag1, i1 %cond_flag2, i1 %cond_flag3) {
55
; CHECK-LABEL: main:
66
; CHECK: # %bb.0: # %for.body.us.preheader.i
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; CHECK-NEXT: andi a3, a3, 1
@@ -58,18 +58,19 @@ define i32 @main(i64 %0, i32 %a.promoted49.i, i1 %tobool.not.us.i.4, i1 %tobool.
5858
; CHECK-NEXT: bge a3, a0, .LBB0_9
5959
; CHECK-NEXT: j .LBB0_10
6060
for.body.us.preheader.i:
61-
%1 = insertelement <4 x i64> zeroinitializer, i64 %0, i64 1
62-
%2 = shufflevector <4 x i64> %1, <4 x i64> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 1, i32 1>
63-
%3 = icmp sle <4 x i64> %2, zeroinitializer
64-
%cond.us.i.4 = select i1 %tobool.not.us.i.4, i32 %a.promoted49.i, i32 1
65-
%cond.us.i.1.4 = select i1 %tobool.not.us.i.1.4, i32 %a.promoted49.i, i32 1
66-
%cond.us.i.2.4 = select i1 %tobool.not.us.i.2.4, i32 %a.promoted49.i, i32 1
67-
%4 = zext <4 x i1> %3 to <4 x i32>
68-
%5 = shufflevector <4 x i32> %4, <4 x i32> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
69-
%6 = call i32 @llvm.vector.reduce.smin.v8i32(<8 x i32> %5)
70-
%7 = call i32 @llvm.smin.i32(i32 %6, i32 %cond.us.i.4)
71-
%8 = call i32 @llvm.smin.i32(i32 %cond.us.i.1.4, i32 %cond.us.i.2.4)
72-
%9 = call i32 @llvm.smin.i32(i32 %7, i32 %8)
73-
store i32 %9, ptr null, align 4
61+
%partial_vector = insertelement <4 x i64> zeroinitializer, i64 %input_value, i64 1
62+
%comparison_vector = shufflevector <4 x i64> %partial_vector, <4 x i64> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 1, i32 1>
63+
%comparison_result = icmp sle <4 x i64> %comparison_vector, zeroinitializer
64+
%selected_value1 = select i1 %cond_flag1, i32 %base_value, i32 1
65+
%selected_value2 = select i1 %cond_flag2, i32 %base_value, i32 1
66+
%selected_value3 = select i1 %cond_flag3, i32 %base_value, i32 1
67+
%bool_to_int = zext <4 x i1> %comparison_result to <4 x i32>
68+
%extended_vector = shufflevector <4 x i32> %bool_to_int, <4 x i32> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
69+
%vector_min = call i32 @llvm.vector.reduce.smin.v8i32(<8 x i32> %extended_vector)
70+
%min1 = call i32 @llvm.smin.i32(i32 %vector_min, i32 %selected_value1)
71+
%min2 = call i32 @llvm.smin.i32(i32 %selected_value2, i32 %selected_value3)
72+
%final_min = call i32 @llvm.smin.i32(i32 %min1, i32 %min2)
73+
store i32 %final_min, ptr null, align 4
7474
ret i32 0
7575
}
76+

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