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nikicnikic
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[CodeGen] Move IsFixed into ArgFlags (NFCI) (#152319)
The information whether a specific argument is vararg or fixed is currently stored separately from all the other argument information in ArgFlags. This means that it is not accessible from CCAssign, and backends have developed all kinds of workarounds for how they can access it after all. Move this information to ArgFlags to make it directly available in all relevant places. I've opted to invert this and store it as IsVarArg, as I think that both makes the meaning more obvious and provides for a better default (which is IsVarArg=false).
1 parent edad89e commit 406d9b1

25 files changed

+101
-161
lines changed

‎llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h‎

Lines changed: 7 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -50,14 +50,12 @@ class LLVM_ABI CallLowering {
5050
struct BaseArgInfo {
5151
Type *Ty;
5252
SmallVector<ISD::ArgFlagsTy, 4> Flags;
53-
bool IsFixed;
5453

5554
BaseArgInfo(Type *Ty,
56-
ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(),
57-
bool IsFixed = true)
58-
: Ty(Ty), Flags(Flags), IsFixed(IsFixed) {}
55+
ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>())
56+
: Ty(Ty), Flags(Flags) {}
5957

60-
BaseArgInfo() : Ty(nullptr), IsFixed(false) {}
58+
BaseArgInfo() : Ty(nullptr) {}
6159
};
6260

6361
struct ArgInfo : public BaseArgInfo {
@@ -81,8 +79,8 @@ class LLVM_ABI CallLowering {
8179

8280
ArgInfo(ArrayRef<Register> Regs, Type *Ty, unsigned OrigIndex,
8381
ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(),
84-
bool IsFixed = true, const Value *OrigValue = nullptr)
85-
: BaseArgInfo(Ty, Flags, IsFixed), Regs(Regs), OrigValue(OrigValue),
82+
const Value *OrigValue = nullptr)
83+
: BaseArgInfo(Ty, Flags), Regs(Regs), OrigValue(OrigValue),
8684
OrigArgIndex(OrigIndex) {
8785
if (!Regs.empty() && Flags.empty())
8886
this->Flags.push_back(ISD::ArgFlagsTy());
@@ -93,9 +91,8 @@ class LLVM_ABI CallLowering {
9391
}
9492

9593
ArgInfo(ArrayRef<Register> Regs, const Value &OrigValue, unsigned OrigIndex,
96-
ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(),
97-
bool IsFixed = true)
98-
: ArgInfo(Regs, OrigValue.getType(), OrigIndex, Flags, IsFixed, &OrigValue) {}
94+
ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>())
95+
: ArgInfo(Regs, OrigValue.getType(), OrigIndex, Flags, &OrigValue) {}
9996

10097
ArgInfo() = default;
10198
};

‎llvm/include/llvm/CodeGen/TargetCallingConv.h‎

Lines changed: 9 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -54,6 +54,8 @@ namespace ISD {
5454
unsigned IsInConsecutiveRegs : 1;
5555
unsigned IsCopyElisionCandidate : 1; ///< Argument copy elision candidate
5656
unsigned IsPointer : 1;
57+
/// Whether this is part of a variable argument list (non-fixed).
58+
unsigned IsVarArg : 1;
5759

5860
unsigned ByValOrByRefSize = 0; ///< Byval or byref struct size
5961

@@ -67,7 +69,7 @@ namespace ISD {
6769
IsSwiftError(0), IsCFGuardTarget(0), IsHva(0), IsHvaStart(0),
6870
IsSecArgPass(0), MemAlign(0), OrigAlign(0),
6971
IsInConsecutiveRegsLast(0), IsInConsecutiveRegs(0),
70-
IsCopyElisionCandidate(0), IsPointer(0) {
72+
IsCopyElisionCandidate(0), IsPointer(0), IsVarArg(0) {
7173
static_assert(sizeof(*this) == 4 * sizeof(unsigned), "flags are too big");
7274
}
7375

@@ -145,6 +147,9 @@ namespace ISD {
145147
bool isPointer() const { return IsPointer; }
146148
void setPointer() { IsPointer = 1; }
147149

150+
bool isVarArg() const { return IsVarArg; }
151+
void setVarArg() { IsVarArg = 1; }
152+
148153
Align getNonZeroMemAlign() const {
149154
return decodeMaybeAlign(MemAlign).valueOrOne();
150155
}
@@ -239,9 +244,6 @@ namespace ISD {
239244
MVT VT;
240245
EVT ArgVT;
241246

242-
/// IsFixed - Is this a "fixed" value, ie not passed through a vararg "...".
243-
bool IsFixed = false;
244-
245247
/// Index original Function's argument.
246248
unsigned OrigArgIndex;
247249

@@ -251,10 +253,9 @@ namespace ISD {
251253
unsigned PartOffset;
252254

253255
OutputArg() = default;
254-
OutputArg(ArgFlagsTy flags, MVT vt, EVT argvt, bool isfixed,
255-
unsigned origIdx, unsigned partOffs)
256-
: Flags(flags), IsFixed(isfixed), OrigArgIndex(origIdx),
257-
PartOffset(partOffs) {
256+
OutputArg(ArgFlagsTy flags, MVT vt, EVT argvt, unsigned origIdx,
257+
unsigned partOffs)
258+
: Flags(flags), OrigArgIndex(origIdx), PartOffset(partOffs) {
258259
VT = vt;
259260
ArgVT = argvt;
260261
}

‎llvm/include/llvm/Target/TargetCallingConv.td‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -97,6 +97,12 @@ class CCIfVarArg<CCAction A> : CCIf<"State.isVarArg()", A> {}
9797
/// CCIfNotVarArg - If the current function is not vararg - apply the action
9898
class CCIfNotVarArg<CCAction A> : CCIf<"!State.isVarArg()", A> {}
9999

100+
/// Apply the action if argument is fixed (not vararg).
101+
class CCIfArgFixed<CCAction A> : CCIf<"!ArgFlags.isVarArg()", A>;
102+
103+
/// Apply the action if argument is vararg (not fixed).
104+
class CCIfArgVarArg<CCAction A> : CCIf<"ArgFlags.isVarArg()", A>;
105+
100106
/// CCIfPtrAddrSpace - If the top-level parent of the current argument has
101107
/// pointer type in the specified address-space.
102108
class CCIfPtrAddrSpace<int AS, CCAction A>

‎llvm/lib/CodeGen/GlobalISel/CallLowering.cpp‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -132,9 +132,10 @@ bool CallLowering::lowerCall(MachineIRBuilder &MIRBuilder, const CallBase &CB,
132132
unsigned i = 0;
133133
unsigned NumFixedArgs = CB.getFunctionType()->getNumParams();
134134
for (const auto &Arg : CB.args()) {
135-
ArgInfo OrigArg{ArgRegs[i], *Arg.get(), i, getAttributesForArgIdx(CB, i),
136-
i < NumFixedArgs};
135+
ArgInfo OrigArg{ArgRegs[i], *Arg.get(), i, getAttributesForArgIdx(CB, i)};
137136
setArgFlags(OrigArg, i + AttributeList::FirstArgIndex, DL, CB);
137+
if (i >= NumFixedArgs)
138+
OrigArg.Flags[0].setVarArg();
138139

139140
// If we have an explicit sret argument that is an Instruction, (i.e., it
140141
// might point to function-local memory), we can't meaningfully tail-call.
@@ -301,7 +302,7 @@ void CallLowering::splitToValueTypes(const ArgInfo &OrigArg,
301302
// double] -> double).
302303
SplitArgs.emplace_back(OrigArg.Regs[0], SplitVTs[0].getTypeForEVT(Ctx),
303304
OrigArg.OrigArgIndex, OrigArg.Flags[0],
304-
OrigArg.IsFixed, OrigArg.OrigValue);
305+
OrigArg.OrigValue);
305306
return;
306307
}
307308

@@ -313,7 +314,7 @@ void CallLowering::splitToValueTypes(const ArgInfo &OrigArg,
313314
for (unsigned i = 0, e = SplitVTs.size(); i < e; ++i) {
314315
Type *SplitTy = SplitVTs[i].getTypeForEVT(Ctx);
315316
SplitArgs.emplace_back(OrigArg.Regs[i], SplitTy, OrigArg.OrigArgIndex,
316-
OrigArg.Flags[0], OrigArg.IsFixed);
317+
OrigArg.Flags[0]);
317318
if (NeedsRegBlock)
318319
SplitArgs.back().Flags[0].setInConsecutiveRegs();
319320
}

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -2273,9 +2273,8 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
22732273
Flags.setNoExt();
22742274

22752275
for (unsigned i = 0; i < NumParts; ++i) {
2276-
Outs.push_back(ISD::OutputArg(Flags,
2277-
Parts[i].getValueType().getSimpleVT(),
2278-
VT, /*isfixed=*/true, 0, 0));
2276+
Outs.push_back(ISD::OutputArg(
2277+
Flags, Parts[i].getValueType().getSimpleVT(), VT, 0, 0));
22792278
OutVals.push_back(Parts[i]);
22802279
}
22812280
}
@@ -2291,9 +2290,9 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
22912290
assert(SwiftError.getFunctionArg() && "Need a swift error argument");
22922291
ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();
22932292
Flags.setSwiftError();
2294-
Outs.push_back(ISD::OutputArg(
2295-
Flags, /*vt=*/TLI.getPointerTy(DL), /*argvt=*/EVT(TLI.getPointerTy(DL)),
2296-
/*isfixed=*/true, /*origidx=*/1, /*partOffs=*/0));
2293+
Outs.push_back(ISD::OutputArg(Flags, /*vt=*/TLI.getPointerTy(DL),
2294+
/*argvt=*/EVT(TLI.getPointerTy(DL)),
2295+
/*origidx=*/1, /*partOffs=*/0));
22972296
// Create SDNode for the swifterror virtual register.
22982297
OutVals.push_back(
22992298
DAG.getRegister(SwiftError.getOrCreateVRegUseAt(
@@ -11124,6 +11123,8 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
1112411123
const Align OriginalAlignment(getABIAlignmentForCallingConv(ArgTy, DL));
1112511124
Flags.setOrigAlign(OriginalAlignment);
1112611125

11126+
if (i >= CLI.NumFixedArgs)
11127+
Flags.setVarArg();
1112711128
if (Args[i].Ty->isPointerTy()) {
1112811129
Flags.setPointer();
1112911130
Flags.setPointerAddrSpace(
@@ -11246,8 +11247,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
1124611247
// For scalable vectors the scalable part is currently handled
1124711248
// by individual targets, so we just use the known minimum size here.
1124811249
ISD::OutputArg MyFlags(
11249-
Flags, Parts[j].getValueType().getSimpleVT(), VT,
11250-
i < CLI.NumFixedArgs, i,
11250+
Flags, Parts[j].getValueType().getSimpleVT(), VT, i,
1125111251
j * Parts[j].getValueType().getStoreSize().getKnownMinValue());
1125211252
if (NumParts > 1 && j == 0)
1125311253
MyFlags.Flags.setSplit();

‎llvm/lib/CodeGen/TargetLoweringBase.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1772,7 +1772,7 @@ void llvm::GetReturnInfo(CallingConv::ID CC, Type *ReturnType,
17721772
Flags.setZExt();
17731773

17741774
for (unsigned i = 0; i < NumParts; ++i)
1775-
Outs.push_back(ISD::OutputArg(Flags, PartVT, VT, /*isfixed=*/true, 0, 0));
1775+
Outs.push_back(ISD::OutputArg(Flags, PartVT, VT, 0, 0));
17761776
}
17771777
}
17781778

‎llvm/lib/Target/AArch64/AArch64ISelLowering.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8537,7 +8537,7 @@ static void analyzeCallOperands(const AArch64TargetLowering &TLI,
85378537
if (IsCalleeWin64) {
85388538
UseVarArgCC = true;
85398539
} else {
8540-
UseVarArgCC = !Outs[i].IsFixed;
8540+
UseVarArgCC = ArgFlags.isVarArg();
85418541
}
85428542
}
85438543

@@ -8982,7 +8982,7 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
89828982
unsigned NumArgs = Outs.size();
89838983

89848984
for (unsigned i = 0; i != NumArgs; ++i) {
8985-
if (!Outs[i].IsFixed && Outs[i].VT.isScalableVector())
8985+
if (Outs[i].Flags.isVarArg() && Outs[i].VT.isScalableVector())
89868986
report_fatal_error("Passing SVE types to variadic functions is "
89878987
"currently not supported");
89888988
}

‎llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -125,7 +125,7 @@ struct AArch64OutgoingValueAssigner
125125
bool UseVarArgsCCForFixed = IsCalleeWin && State.isVarArg();
126126

127127
bool Res;
128-
if (Info.IsFixed && !UseVarArgsCCForFixed) {
128+
if (!Flags.isVarArg() && !UseVarArgsCCForFixed) {
129129
if (!IsReturn)
130130
applyStackPassedSmallTypeDAGHack(OrigVT, ValVT, LocVT);
131131
Res = AssignFn(ValNo, ValVT, LocVT, LocInfo, Flags, State);
@@ -361,7 +361,7 @@ struct OutgoingArgHandler : public CallLowering::OutgoingValueHandler {
361361
unsigned MaxSize = MemTy.getSizeInBytes() * 8;
362362
// For varargs, we always want to extend them to 8 bytes, in which case
363363
// we disable setting a max.
364-
if (!Arg.IsFixed)
364+
if (Arg.Flags[0].isVarArg())
365365
MaxSize = 0;
366366

367367
Register ValVReg = Arg.Regs[RegIndex];

‎llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp‎

Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -6729,8 +6729,7 @@ static bool CC_LoongArchAssign2GRLen(unsigned GRLen, CCState &State,
67296729
static bool CC_LoongArch(const DataLayout &DL, LoongArchABI::ABI ABI,
67306730
unsigned ValNo, MVT ValVT,
67316731
CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
6732-
CCState &State, bool IsFixed, bool IsRet,
6733-
Type *OrigTy) {
6732+
CCState &State, bool IsRet, Type *OrigTy) {
67346733
unsigned GRLen = DL.getLargestLegalIntTypeSizeInBits();
67356734
assert((GRLen == 32 || GRLen == 64) && "Unspport GRLen");
67366735
MVT GRLenVT = GRLen == 32 ? MVT::i32 : MVT::i64;
@@ -6752,7 +6751,7 @@ static bool CC_LoongArch(const DataLayout &DL, LoongArchABI::ABI ABI,
67526751
case LoongArchABI::ABI_LP64F:
67536752
case LoongArchABI::ABI_ILP32D:
67546753
case LoongArchABI::ABI_LP64D:
6755-
UseGPRForFloat = !IsFixed;
6754+
UseGPRForFloat = ArgFlags.isVarArg();
67566755
break;
67576756
case LoongArchABI::ABI_ILP32S:
67586757
case LoongArchABI::ABI_LP64S:
@@ -6766,7 +6765,8 @@ static bool CC_LoongArch(const DataLayout &DL, LoongArchABI::ABI ABI,
67666765
// will not be passed by registers if the original type is larger than
67676766
// 2*GRLen, so the register alignment rule does not apply.
67686767
unsigned TwoGRLenInBytes = (2 * GRLen) / 8;
6769-
if (!IsFixed && ArgFlags.getNonZeroOrigAlign() == TwoGRLenInBytes &&
6768+
if (ArgFlags.isVarArg() &&
6769+
ArgFlags.getNonZeroOrigAlign() == TwoGRLenInBytes &&
67706770
DL.getTypeAllocSize(OrigTy) == TwoGRLenInBytes) {
67716771
unsigned RegIdx = State.getFirstUnallocated(ArgGPRs);
67726772
// Skip 'odd' register if necessary.
@@ -6916,7 +6916,7 @@ void LoongArchTargetLowering::analyzeInputArgs(
69166916
LoongArchABI::ABI ABI =
69176917
MF.getSubtarget<LoongArchSubtarget>().getTargetABI();
69186918
if (Fn(MF.getDataLayout(), ABI, i, ArgVT, CCValAssign::Full, Ins[i].Flags,
6919-
CCInfo, /*IsFixed=*/true, IsRet, ArgTy)) {
6919+
CCInfo, IsRet, ArgTy)) {
69206920
LLVM_DEBUG(dbgs() << "InputArg #" << i << " has unhandled type " << ArgVT
69216921
<< '\n');
69226922
llvm_unreachable("");
@@ -6934,7 +6934,7 @@ void LoongArchTargetLowering::analyzeOutputArgs(
69346934
LoongArchABI::ABI ABI =
69356935
MF.getSubtarget<LoongArchSubtarget>().getTargetABI();
69366936
if (Fn(MF.getDataLayout(), ABI, i, ArgVT, CCValAssign::Full, Outs[i].Flags,
6937-
CCInfo, Outs[i].IsFixed, IsRet, OrigTy)) {
6937+
CCInfo, IsRet, OrigTy)) {
69386938
LLVM_DEBUG(dbgs() << "OutputArg #" << i << " has unhandled type " << ArgVT
69396939
<< "\n");
69406940
llvm_unreachable("");
@@ -7647,8 +7647,7 @@ bool LoongArchTargetLowering::CanLowerReturn(
76477647
LoongArchABI::ABI ABI =
76487648
MF.getSubtarget<LoongArchSubtarget>().getTargetABI();
76497649
if (CC_LoongArch(MF.getDataLayout(), ABI, i, Outs[i].VT, CCValAssign::Full,
7650-
Outs[i].Flags, CCInfo, /*IsFixed=*/true, /*IsRet=*/true,
7651-
nullptr))
7650+
Outs[i].Flags, CCInfo, /*IsRet=*/true, nullptr))
76527651
return false;
76537652
}
76547653
return true;

‎llvm/lib/Target/LoongArch/LoongArchISelLowering.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -330,7 +330,7 @@ class LoongArchTargetLowering : public TargetLowering {
330330
unsigned ValNo, MVT ValVT,
331331
CCValAssign::LocInfo LocInfo,
332332
ISD::ArgFlagsTy ArgFlags, CCState &State,
333-
bool IsFixed, bool IsRet, Type *OrigTy);
333+
bool IsRet, Type *OrigTy);
334334

335335
void analyzeInputArgs(MachineFunction &MF, CCState &CCInfo,
336336
const SmallVectorImpl<ISD::InputArg> &Ins, bool IsRet,

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