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llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll

Lines changed: 28 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -7,30 +7,40 @@ declare i64 @llvm.usub.sat.i64(i64, i64)
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define i1 @uadd_sat_uge(i64 %a, i64 %b) {
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; CHECK-LABEL: define i1 @uadd_sat_uge(
99
; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {
10-
; CHECK-NEXT: [[PRECOND:%.*]] = icmp ugt i64 [[A]], [[B]]
11-
; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
12-
; CHECK-NEXT: [[ADD_SAT:%.*]] = call i64 @llvm.uadd.sat.i64(i64 [[A]], i64 1)
13-
; CHECK-NEXT: ret i1 true
10+
; CHECK-NEXT: [[ADD_SAT:%.*]] = call i64 @llvm.uadd.sat.i64(i64 [[A]], i64 [[B]])
11+
; CHECK-NEXT: [[CMP1:%.*]] = icmp uge i64 [[ADD_SAT]], [[A]]
12+
; CHECK-NEXT: [[CMP2:%.*]] = icmp uge i64 [[ADD_SAT]], [[B]]
13+
; CHECK-NEXT: [[CMP:%.*]] = and i1 [[CMP1]], [[CMP2]]
14+
; CHECK-NEXT: ret i1 [[CMP]]
1415
;
15-
%precond = icmp ugt i64 %a, %b
16-
call void @llvm.assume(i1 %precond)
17-
%add.sat = call i64 @llvm.uadd.sat.i64(i64 %a, i64 1)
18-
%cmp = icmp ugt i64 %add.sat, %b
16+
%add.sat = call i64 @llvm.uadd.sat.i64(i64 %a, i64 %b)
17+
%cmp1 = icmp uge i64 %add.sat, %a
18+
%cmp2 = icmp uge i64 %add.sat, %b
19+
%cmp = and i1 %cmp1, %cmp2
1920
ret i1 %cmp
2021
}
2122

23+
define i1 @usub_sat_ule_lhs(i64 %a, i64 %b) {
24+
; CHECK-LABEL: define i1 @usub_sat_ule_lhs(
25+
; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {
26+
; CHECK-NEXT: [[SUB_SAT:%.*]] = call i64 @llvm.usub.sat.i64(i64 [[A]], i64 [[B]])
27+
; CHECK-NEXT: [[CMP:%.*]] = icmp ule i64 [[SUB_SAT]], [[A]]
28+
; CHECK-NEXT: ret i1 [[CMP]]
29+
;
30+
%sub.sat = call i64 @llvm.usub.sat.i64(i64 %a, i64 %b)
31+
%cmp = icmp ule i64 %sub.sat, %a
32+
ret i1 %cmp
33+
}
2234

23-
define i1 @usub_sat_ule(i64 %a, i64 %b) {
24-
; CHECK-LABEL: define i1 @usub_sat_ule(
35+
; Negative test
36+
define i1 @usub_sat_not_ule_rhs(i64 %a, i64 %b) {
37+
; CHECK-LABEL: define i1 @usub_sat_not_ule_rhs(
2538
; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {
26-
; CHECK-NEXT: [[PRECOND:%.*]] = icmp ult i64 [[A]], [[B]]
27-
; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
28-
; CHECK-NEXT: [[SUB_SAT:%.*]] = call i64 @llvm.usub.sat.i64(i64 [[A]], i64 1)
29-
; CHECK-NEXT: ret i1 true
39+
; CHECK-NEXT: [[SUB_SAT:%.*]] = call i64 @llvm.usub.sat.i64(i64 [[A]], i64 [[B]])
40+
; CHECK-NEXT: [[CMP:%.*]] = icmp ule i64 [[SUB_SAT]], [[B]]
41+
; CHECK-NEXT: ret i1 [[CMP]]
3042
;
31-
%precond = icmp ult i64 %a, %b
32-
call void @llvm.assume(i1 %precond)
33-
%sub.sat = call i64 @llvm.usub.sat.i64(i64 %a, i64 1)
34-
%cmp = icmp ult i64 %sub.sat, %b
43+
%sub.sat = call i64 @llvm.usub.sat.i64(i64 %a, i64 %b)
44+
%cmp = icmp ule i64 %sub.sat, %b
3545
ret i1 %cmp
3646
}

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