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Remove parens from BaseClassAddrOp assembly format
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2 files changed

+4
-5
lines changed

2 files changed

+4
-5
lines changed

clang/include/clang/CIR/Dialect/IR/CIROps.td

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2255,7 +2255,7 @@ def BaseClassAddrOp : CIR_Op<"base_class_addr"> {
22552255
```
22562256
will generate
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```mlir
2258-
%3 = cir.base_class_addr (%1 : !cir.ptr<!rec_Derived> nonnull) [0] -> !cir.ptr<!rec_Base>
2258+
%3 = cir.base_class_addr %1 : !cir.ptr<!rec_Derived> nonnull [0] -> !cir.ptr<!rec_Base>
22592259
```
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}];
22612261

@@ -2268,10 +2268,9 @@ def BaseClassAddrOp : CIR_Op<"base_class_addr"> {
22682268
let results = (outs Res<CIR_PointerType, "">:$base_addr);
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22702270
let assemblyFormat = [{
2271-
`(`
22722271
$derived_addr `:` qualified(type($derived_addr))
22732272
(`nonnull` $assume_not_null^)?
2274-
`)` `[` $offset `]` `->` qualified(type($base_addr)) attr-dict
2273+
` ` `[` $offset `]` `->` qualified(type($base_addr)) attr-dict
22752274
}];
22762275
}
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clang/test/CIR/CodeGen/class.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -71,7 +71,7 @@ int use_base() {
7171

7272
// CIR: cir.func @_Z8use_basev
7373
// CIR: %[[D_ADDR:.*]] = cir.alloca !rec_Derived, !cir.ptr<!rec_Derived>, ["d"]
74-
// CIR: %[[BASE_ADDR:.*]] cir.base_class_addr(%[[D_ADDR]] : !cir.ptr<!rec_Derived> nonnull) [0] -> !cir.ptr<!rec_Base>
74+
// CIR: %[[BASE_ADDR:.*]] cir.base_class_addr %[[D_ADDR]] : !cir.ptr<!rec_Derived> nonnull [0] -> !cir.ptr<!rec_Base>
7575
// CIR: %[[D_A_ADDR:.*]] = cir.get_member %2[0] {name = "a"} : !cir.ptr<!rec_Base> -> !cir.ptr<!s32i>
7676
// CIR: %[[D_A:.*]] = cir.load align(4) %3 : !cir.ptr<!s32i>, !s32i
7777

@@ -91,7 +91,7 @@ int use_base_via_pointer(Derived *d) {
9191
// CIR: %[[D_ADDR:.*]] = cir.alloca !cir.ptr<!rec_Derived>, !cir.ptr<!cir.ptr<!rec_Derived>>, ["d", init]
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// CIR: cir.store %[[ARG0]], %[[D_ADDR]]
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// CIR: %[[D:.*]] = cir.load align(8) %[[D_ADDR]]
94-
// CIR: %[[BASE_ADDR:.*]] = cir.base_class_addr(%[[D]] : !cir.ptr<!rec_Derived> nonnull) [0] -> !cir.ptr<!rec_Base>
94+
// CIR: %[[BASE_ADDR:.*]] = cir.base_class_addr %[[D]] : !cir.ptr<!rec_Derived> nonnull [0] -> !cir.ptr<!rec_Base>
9595
// CIR: %[[D_A_ADDR:.*]] = cir.get_member %[[BASE_ADDR]][0] {name = "a"}
9696
// CIR: %[[D_A:.*]] = cir.load align(4) %[[D_A_ADDR]]
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