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1 parent ba81e19 commit 4161ca2Copy full SHA for 4161ca2
llvm/docs/ReleaseNotes.md
@@ -110,6 +110,9 @@ Changes to the AArch64 Backend
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the required alignment space with a sequence of `0x0` bytes (the requested
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fill value) rather than NOPs.
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+* Assembler/disassembler support has been added for Armv9.6-A (2024)
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+ architecture extensions.
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+
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Changes to the AMDGPU Backend
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-----------------------------
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