Add fcmp+select testcase

Author: wzssyqa

llvm/test/CodeGen/X86/fcmp-nofpclass.ll

@@ -0,0 +1,118 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2     | FileCheck %s --check-prefixes=SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx      | FileCheck %s --check-prefixes=AVX
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx        | FileCheck %s --check-prefixes=X86
+
+define dso_local noundef float @maxs(float noundef nofpclass(nan) %a, float noundef nofpclass(nan) %b) local_unnamed_addr #0 {
+; SSE2-LABEL: maxs:
+; SSE2:       # %bb.0: # %entry
+; SSE2-NEXT:    maxss %xmm1, %xmm0
+; SSE2-NEXT:    retq
+;
+; AVX-LABEL: maxs:
+; AVX:       # %bb.0: # %entry
+; AVX-NEXT:    vmaxss %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    retq
+;
+; X86-LABEL: maxs:
+; X86:       # %bb.0: # %entry
+; X86-NEXT:    pushl %eax
+; X86-NEXT:    .cfi_def_cfa_offset 8
+; X86-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X86-NEXT:    vmaxss {{[0-9]+}}(%esp), %xmm0, %xmm0
+; X86-NEXT:    vmovss %xmm0, (%esp)
+; X86-NEXT:    flds (%esp)
+; X86-NEXT:    popl %eax
+; X86-NEXT:    .cfi_def_cfa_offset 4
+; X86-NEXT:    retl
+entry:
+  %cmp = fcmp ogt float %a, %b
+  %cond = select i1 %cmp, float %a, float %b
+  ret float %cond
+}
+
+define dso_local noundef <8 x float> @maxs_v8f32(<8 x float> noundef nofpclass(nan) %a, <8 x float> noundef nofpclass(nan) %b) local_unnamed_addr #0 {
+; SSE2-LABEL: maxs_v8f32:
+; SSE2:       # %bb.0: # %entry
+; SSE2-NEXT:    maxps %xmm2, %xmm0
+; SSE2-NEXT:    maxps %xmm3, %xmm1
+; SSE2-NEXT:    retq
+;
+; AVX-LABEL: maxs_v8f32:
+; AVX:       # %bb.0: # %entry
+; AVX-NEXT:    vmaxps %ymm1, %ymm0, %ymm0
+; AVX-NEXT:    retq
+;
+; X86-LABEL: maxs_v8f32:
+; X86:       # %bb.0: # %entry
+; X86-NEXT:    vmaxps %ymm1, %ymm0, %ymm0
+; X86-NEXT:    retl
+entry:
+  %cmp = fcmp ogt <8 x float> %a, %b
+  %cond = select <8 x i1> %cmp, <8 x float> %a, <8 x float> %b
+  ret <8 x float> %cond
+}
+
+define dso_local noundef float @maxd(float noundef nofpclass(nan) %a, float noundef nofpclass(nan) %b) local_unnamed_addr #0 {
+; SSE2-LABEL: maxd:
+; SSE2:       # %bb.0: # %entry
+; SSE2-NEXT:    maxss %xmm1, %xmm0
+; SSE2-NEXT:    retq
+;
+; AVX-LABEL: maxd:
+; AVX:       # %bb.0: # %entry
+; AVX-NEXT:    vmaxss %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    retq
+;
+; X86-LABEL: maxd:
+; X86:       # %bb.0: # %entry
+; X86-NEXT:    pushl %eax
+; X86-NEXT:    .cfi_def_cfa_offset 8
+; X86-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X86-NEXT:    vmaxss {{[0-9]+}}(%esp), %xmm0, %xmm0
+; X86-NEXT:    vmovss %xmm0, (%esp)
+; X86-NEXT:    flds (%esp)
+; X86-NEXT:    popl %eax
+; X86-NEXT:    .cfi_def_cfa_offset 4
+; X86-NEXT:    retl
+entry:
+  %cmp = fcmp ogt float %a, %b
+  %cond = select i1 %cmp, float %a, float %b
+  ret float %cond
+}
+
+define dso_local noundef <8 x double> @mind_v8f32(<8 x double> noundef nofpclass(nan) %a, <8 x double> noundef nofpclass(nan) %b) local_unnamed_addr #0 {
+; SSE2-LABEL: mind_v8f32:
+; SSE2:       # %bb.0: # %entry
+; SSE2-NEXT:    maxpd %xmm4, %xmm0
+; SSE2-NEXT:    maxpd %xmm5, %xmm1
+; SSE2-NEXT:    maxpd %xmm6, %xmm2
+; SSE2-NEXT:    maxpd %xmm7, %xmm3
+; SSE2-NEXT:    retq
+;
+; AVX-LABEL: mind_v8f32:
+; AVX:       # %bb.0: # %entry
+; AVX-NEXT:    vmaxpd %ymm2, %ymm0, %ymm0
+; AVX-NEXT:    vmaxpd %ymm3, %ymm1, %ymm1
+; AVX-NEXT:    retq
+;
+; X86-LABEL: mind_v8f32:
+; X86:       # %bb.0: # %entry
+; X86-NEXT:    pushl %ebp
+; X86-NEXT:    .cfi_def_cfa_offset 8
+; X86-NEXT:    .cfi_offset %ebp, -8
+; X86-NEXT:    movl %esp, %ebp
+; X86-NEXT:    .cfi_def_cfa_register %ebp
+; X86-NEXT:    andl $-32, %esp
+; X86-NEXT:    subl $32, %esp
+; X86-NEXT:    vmaxpd %ymm2, %ymm0, %ymm0
+; X86-NEXT:    vmaxpd 8(%ebp), %ymm1, %ymm1
+; X86-NEXT:    movl %ebp, %esp
+; X86-NEXT:    popl %ebp
+; X86-NEXT:    .cfi_def_cfa %esp, 4
+; X86-NEXT:    retl
+entry:
+  %cmp = fcmp ogt <8 x double> %a, %b
+  %cond = select <8 x i1> %cmp, <8 x double> %a, <8 x double> %b
+  ret <8 x double> %cond
+}