@@ -1757,7 +1757,6 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
17571757
17581758 setOperationAction (ISD::CTPOP, MVT::i64 ,
17591759 Subtarget->usePopc () ? Legal : Expand);
1760- setOperationAction (ISD::CTTZ, MVT::i64 , Expand);
17611760 setOperationAction (ISD::BSWAP, MVT::i64 , Expand);
17621761 setOperationAction (ISD::ROTL , MVT::i64 , Expand);
17631762 setOperationAction (ISD::ROTR , MVT::i64 , Expand);
@@ -1817,8 +1816,7 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
18171816 setOperationAction (ISD::FCOS , MVT::f32 , Expand);
18181817 setOperationAction (ISD::FSINCOS, MVT::f32 , Expand);
18191818 setOperationAction (ISD::FREM , MVT::f32 , Expand);
1820- setOperationAction (ISD::FMA , MVT::f32 , Expand);
1821- setOperationAction (ISD::CTTZ, MVT::i32 , Expand);
1819+ setOperationAction (ISD::FMA, MVT::f32 , Expand);
18221820 setOperationAction (ISD::ROTL , MVT::i32 , Expand);
18231821 setOperationAction (ISD::ROTR , MVT::i32 , Expand);
18241822 setOperationAction (ISD::BSWAP, MVT::i32 , Expand);
@@ -1996,17 +1994,36 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
19961994 setOperationAction (ISD::CTLZ, MVT::i64 , Legal);
19971995 setOperationAction (ISD::CTLZ_ZERO_UNDEF, MVT::i32 , Legal);
19981996 setOperationAction (ISD::CTLZ_ZERO_UNDEF, MVT::i64 , Legal);
1997+
1998+ setOperationAction (ISD::CTTZ, MVT::i32 ,
1999+ Subtarget->is64Bit () ? Promote : Expand);
2000+ setOperationAction (ISD::CTTZ, MVT::i64 , Expand);
2001+ setOperationAction (ISD::CTTZ_ZERO_UNDEF, MVT::i32 ,
2002+ Subtarget->is64Bit () ? Promote : Expand);
2003+ setOperationAction (ISD::CTTZ_ZERO_UNDEF, MVT::i64 , Expand);
19992004 } else if (Subtarget->usePopc ()) {
20002005 setOperationAction (ISD::CTLZ, MVT::i32 , Expand);
20012006 setOperationAction (ISD::CTLZ, MVT::i64 , Expand);
20022007 setOperationAction (ISD::CTLZ_ZERO_UNDEF, MVT::i32 , Expand);
20032008 setOperationAction (ISD::CTLZ_ZERO_UNDEF, MVT::i64 , Expand);
2009+
2010+ setOperationAction (ISD::CTTZ, MVT::i32 , Expand);
2011+ setOperationAction (ISD::CTTZ, MVT::i64 , Expand);
2012+ setOperationAction (ISD::CTTZ_ZERO_UNDEF, MVT::i32 , Expand);
2013+ setOperationAction (ISD::CTTZ_ZERO_UNDEF, MVT::i64 , Expand);
20042014 } else {
20052015 setOperationAction (ISD::CTLZ, MVT::i32 , Expand);
20062016 setOperationAction (ISD::CTLZ, MVT::i64 , Expand);
20072017 setOperationAction (ISD::CTLZ_ZERO_UNDEF, MVT::i32 ,
20082018 Subtarget->is64Bit () ? Promote : LibCall);
20092019 setOperationAction (ISD::CTLZ_ZERO_UNDEF, MVT::i64 , LibCall);
2020+
2021+ // FIXME here we don't have any ISA extensions that could help us, so to
2022+ // prevent large expansions those should be made into LibCalls.
2023+ setOperationAction (ISD::CTTZ, MVT::i32 , Expand);
2024+ setOperationAction (ISD::CTTZ, MVT::i64 , Expand);
2025+ setOperationAction (ISD::CTTZ_ZERO_UNDEF, MVT::i32 , Expand);
2026+ setOperationAction (ISD::CTTZ_ZERO_UNDEF, MVT::i64 , Expand);
20102027 }
20112028
20122029 setOperationAction (ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
@@ -3596,6 +3613,15 @@ bool SparcTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT,
35963613
35973614bool SparcTargetLowering::isCtlzFast () const { return Subtarget->isVIS3 (); }
35983615
3616+ bool SparcTargetLowering::isCheapToSpeculateCttz (Type *Ty) const {
3617+ // We lack native cttz, however,
3618+ // On 64-bit targets it is cheap to implement it in terms of popc.
3619+ if (Subtarget->is64Bit () && Subtarget->usePopc ())
3620+ return true ;
3621+ // Otherwise, implementing cttz in terms of ctlz is still cheap.
3622+ return isCheapToSpeculateCtlz (Ty);
3623+ }
3624+
35993625// Override to disable global variable loading on Linux.
36003626void SparcTargetLowering::insertSSPDeclarations (Module &M) const {
36013627 if (!Subtarget->isTargetLinux ())
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