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1 parent 02ff3e3 commit 424219dCopy full SHA for 424219d
compiler-rt/lib/builtins/arm/floatunssidfvfp.S
@@ -24,7 +24,7 @@ DEFINE_COMPILERRT_FUNCTION(__floatunssidfvfp)
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#else
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vmov s15, r0 // move int to float register s15
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vcvt.f64.u32 d7, s15 // convert 32-bit int in s15 to double in d7
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- VMOV_FROM_DOUBLE(r0, r1, r7) // move d7 to result register pair r0/r1
+ VMOV_FROM_DOUBLE(r0, r1, d7) // move d7 to result register pair r0/r1
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#endif
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bx lr
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END_COMPILERRT_FUNCTION(__floatunssidfvfp)
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