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[X86] Update conditional logic in cload/cstore and update cf.ll tests
1 parent 00d3cb8 commit 42a27c7

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2 files changed

+6
-4
lines changed

2 files changed

+6
-4
lines changed

llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -58332,11 +58332,12 @@ static SDValue combineX86CloadCstore(SDNode *N, SelectionDAG &DAG) {
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} else if (Op1.getOpcode() == ISD::AND && Sub.getValue(0).use_empty()) {
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SDValue Src = Op1;
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SDValue Op10 = Op1.getOperand(0);
58335-
if (Op10.getOpcode() == ISD::XOR && isAllOnesConstant(Op10.getOperand(1))) {
58336-
// res, flags2 = sub 0, (and (xor X, -1), Y)
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if (Op10.getOpcode() == ISD::XOR && isAllOnesConstant(Op10.getOperand(1)) &&
58336+
llvm::isOneConstant(Op1.getOperand(1))) {
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// res, flags2 = sub 0, (and (xor X, -1), 1)
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// cload/cstore ..., cond_ne, flag2
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// ->
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// res, flags2 = sub 0, (and X, Y)
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// res, flags2 = sub 0, (and X, 1)
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// cload/cstore ..., cond_e, flag2
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Src = DAG.getNode(ISD::AND, DL, Op1.getValueType(), Op10.getOperand(0),
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Op1.getOperand(1));

llvm/test/CodeGen/X86/apx/cf.ll

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -235,9 +235,10 @@ define void @and_cond(i32 %a, i1 %b) {
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: testl %edi, %edi
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; CHECK-NEXT: setg %al
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; CHECK-NEXT: notb %sil
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: testb %al, %sil
240-
; CHECK-NEXT: cfcmovel %ecx, 0
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; CHECK-NEXT: cfcmovnel %ecx, 0
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; CHECK-NEXT: retq
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entry:
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%0 = icmp sgt i32 %a, 0

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