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+27
-28
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llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

Lines changed: 24 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -4425,8 +4425,8 @@ determineSVEStackObjectOffsets(MachineFunction &MF, bool AssignOffsets,
44254425
// With SplitSVEObjects we maintain separate stack offsets for predicates
44264426
// (PPRs) and SVE vectors (ZPRs). When SplitSVEObjects is disabled predicates
44274427
// are included in the SVE vector area.
4428-
int64_t &ZPROffset = SVEStack.ZPRStackSize;
4429-
int64_t &PPROffset =
4428+
uint64_t &ZPRStackTop = SVEStack.ZPRStackSize;
4429+
uint64_t &PPRStackTop =
44304430
SplitSVEObjects ? SVEStack.PPRStackSize : SVEStack.ZPRStackSize;
44314431

44324432
#ifndef NDEBUG
@@ -4437,10 +4437,10 @@ determineSVEStackObjectOffsets(MachineFunction &MF, bool AssignOffsets,
44374437
"reference.");
44384438
#endif
44394439

4440-
auto OffsetForObject = [&](int FI, int64_t &ZPROffset,
4441-
int64_t &PPROffset) -> int64_t & {
4442-
return MFI.getStackID(FI) == TargetStackID::ScalableVector ? ZPROffset
4443-
: PPROffset;
4440+
auto StackForObject = [&](int FI, uint64_t &ZPRStackTop,
4441+
uint64_t &PPRStackTop) -> uint64_t & {
4442+
return MFI.getStackID(FI) == TargetStackID::ScalableVector ? ZPRStackTop
4443+
: PPRStackTop;
44444444
};
44454445

44464446
auto Assign = [&MFI](int FI, int64_t Offset) {
@@ -4452,19 +4452,17 @@ determineSVEStackObjectOffsets(MachineFunction &MF, bool AssignOffsets,
44524452
int MinCSFrameIndex, MaxCSFrameIndex;
44534453
if (getSVECalleeSaveSlotRange(MFI, MinCSFrameIndex, MaxCSFrameIndex)) {
44544454
for (int FI = MinCSFrameIndex; FI <= MaxCSFrameIndex; ++FI) {
4455-
int64_t &Offset = OffsetForObject(FI, ZPROffset, PPROffset);
4456-
Offset += MFI.getObjectSize(FI);
4457-
Offset = alignTo(Offset, MFI.getObjectAlign(FI));
4458-
if (AssignOffsets) {
4459-
LLVM_DEBUG(dbgs() << "FI: " << FI << ", Offset: " << -Offset << "\n");
4460-
Assign(FI, -Offset);
4461-
}
4455+
uint64_t &StackTop = StackForObject(FI, ZPRStackTop, PPRStackTop);
4456+
StackTop += MFI.getObjectSize(FI);
4457+
StackTop = alignTo(StackTop, MFI.getObjectAlign(FI));
4458+
if (AssignOffsets)
4459+
Assign(FI, -int64_t(StackTop));
44624460
}
44634461
}
44644462

44654463
// Ensure the CS area is 16-byte aligned.
4466-
PPROffset = alignTo(PPROffset, Align(16U));
4467-
ZPROffset = alignTo(ZPROffset, Align(16U));
4464+
PPRStackTop = alignTo(PPRStackTop, Align(16U));
4465+
ZPRStackTop = alignTo(ZPRStackTop, Align(16U));
44684466

44694467
// Create a buffer of SVE objects to allocate and sort it.
44704468
SmallVector<int, 8> ObjectsToAllocate;
@@ -4501,14 +4499,14 @@ determineSVEStackObjectOffsets(MachineFunction &MF, bool AssignOffsets,
45014499
report_fatal_error(
45024500
"Alignment of scalable vectors > 16 bytes is not yet supported");
45034501

4504-
int64_t &Offset = OffsetForObject(FI, ZPROffset, PPROffset);
4505-
Offset = alignTo(Offset + MFI.getObjectSize(FI), Alignment);
4502+
uint64_t &StackTop = StackForObject(FI, ZPRStackTop, PPRStackTop);
4503+
StackTop = alignTo(StackTop + MFI.getObjectSize(FI), Alignment);
45064504
if (AssignOffsets)
4507-
Assign(FI, -Offset);
4505+
Assign(FI, -int64_t(StackTop));
45084506
}
45094507

4510-
PPROffset = alignTo(PPROffset, Align(16U));
4511-
ZPROffset = alignTo(ZPROffset, Align(16U));
4508+
PPRStackTop = alignTo(PPRStackTop, Align(16U));
4509+
ZPRStackTop = alignTo(ZPRStackTop, Align(16U));
45124510
return SVEStack;
45134511
}
45144512

@@ -4517,9 +4515,11 @@ AArch64FrameLowering::estimateSVEStackObjectOffsets(MachineFunction &MF) const {
45174515
return determineSVEStackObjectOffsets(MF, false);
45184516
}
45194517

4520-
SVEStackSizes
4521-
AArch64FrameLowering::assignSVEStackObjectOffsets(MachineFunction &MF) const {
4522-
return determineSVEStackObjectOffsets(MF, true);
4518+
void AArch64FrameLowering::assignSVEStackObjectOffsets(
4519+
MachineFunction &MF) const {
4520+
auto [ZPRStackSize, PPRStackSize] = determineSVEStackObjectOffsets(MF, true);
4521+
MF.getInfo<AArch64FunctionInfo>()->setStackSizeSVE(ZPRStackSize,
4522+
PPRStackSize);
45234523
}
45244524

45254525
/// Attempts to scavenge a register from \p ScavengeableRegs given the used
@@ -4833,8 +4833,7 @@ void AArch64FrameLowering::processFunctionBeforeFrameFinalized(
48334833
assert(getStackGrowthDirection() == TargetFrameLowering::StackGrowsDown &&
48344834
"Upwards growing stack unsupported");
48354835

4836-
auto [ZPRStackSize, PPRStackSize] = assignSVEStackObjectOffsets(MF);
4837-
AFI->setStackSizeSVE(ZPRStackSize, PPRStackSize);
4836+
assignSVEStackObjectOffsets(MF);
48384837

48394838
// If this function isn't doing Win64-style C++ EH, we don't need to do
48404839
// anything.

llvm/lib/Target/AArch64/AArch64FrameLowering.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -20,8 +20,8 @@
2020
namespace llvm {
2121

2222
struct SVEStackSizes {
23-
int64_t ZPRStackSize{0};
24-
int64_t PPRStackSize{0};
23+
uint64_t ZPRStackSize{0};
24+
uint64_t PPRStackSize{0};
2525
};
2626

2727
class AArch64FrameLowering : public TargetFrameLowering {
@@ -161,7 +161,7 @@ class AArch64FrameLowering : public TargetFrameLowering {
161161
uint64_t StackBumpBytes) const;
162162

163163
SVEStackSizes estimateSVEStackObjectOffsets(MachineFunction &MF) const;
164-
SVEStackSizes assignSVEStackObjectOffsets(MachineFunction &MF) const;
164+
void assignSVEStackObjectOffsets(MachineFunction &MF) const;
165165
bool shouldCombineCSRLocalStackBumpInEpilogue(MachineBasicBlock &MBB,
166166
uint64_t StackBumpBytes) const;
167167
void emitCalleeSavedGPRLocations(MachineBasicBlock &MBB,

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