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lines changed Original file line number Diff line number Diff line change @@ -58,6 +58,7 @@ enum class LangAS : unsigned {
5858
5959 // HLSL specific address spaces.
6060 hlsl_groupshared,
61+ hlsl_private,
6162
6263 // Wasm specific address spaces.
6364 wasm_funcref,
Original file line number Diff line number Diff line change @@ -2553,6 +2553,8 @@ std::string Qualifiers::getAddrSpaceAsString(LangAS AS) {
25532553 return " __funcref" ;
25542554 case LangAS::hlsl_groupshared:
25552555 return " groupshared" ;
2556+ case LangAS::hlsl_private:
2557+ return " hlsl_private" ;
25562558 default :
25572559 return std::to_string (toTargetAddressSpace (AS));
25582560 }
Original file line number Diff line number Diff line change @@ -47,6 +47,7 @@ static const LangASMap FakeAddrSpaceMap = {
4747 11 , // ptr32_uptr
4848 12 , // ptr64
4949 13 , // hlsl_groupshared
50+ 14 , // hlsl_private
5051 20 , // wasm_funcref
5152};
5253
Original file line number Diff line number Diff line change @@ -44,6 +44,7 @@ static const unsigned ARM64AddrSpaceMap[] = {
4444 static_cast <unsigned >(AArch64AddrSpace::ptr32_uptr),
4545 static_cast <unsigned >(AArch64AddrSpace::ptr64),
4646 0 , // hlsl_groupshared
47+ 0 , // hlsl_private
4748 // Wasm address space values for this target are dummy values,
4849 // as it is only enabled for Wasm targets.
4950 20 , // wasm_funcref
Original file line number Diff line number Diff line change @@ -59,6 +59,7 @@ const LangASMap AMDGPUTargetInfo::AMDGPUDefIsGenMap = {
5959 llvm::AMDGPUAS::FLAT_ADDRESS, // ptr32_uptr
6060 llvm::AMDGPUAS::FLAT_ADDRESS, // ptr64
6161 llvm::AMDGPUAS::FLAT_ADDRESS, // hlsl_groupshared
62+ llvm::AMDGPUAS::FLAT_ADDRESS, // hlsl_private
6263};
6364
6465const LangASMap AMDGPUTargetInfo::AMDGPUDefIsPrivMap = {
@@ -83,6 +84,7 @@ const LangASMap AMDGPUTargetInfo::AMDGPUDefIsPrivMap = {
8384 llvm::AMDGPUAS::FLAT_ADDRESS, // ptr32_uptr
8485 llvm::AMDGPUAS::FLAT_ADDRESS, // ptr64
8586 llvm::AMDGPUAS::FLAT_ADDRESS, // hlsl_groupshared
87+ llvm::AMDGPUAS::FLAT_ADDRESS, // hlsl_private
8688
8789};
8890} // namespace targets
Original file line number Diff line number Diff line change @@ -33,15 +33,16 @@ static const unsigned DirectXAddrSpaceMap[] = {
3333 0 , // cuda_constant
3434 0 , // cuda_shared
3535 // SYCL address space values for this map are dummy
36- 0 , // sycl_global
37- 0 , // sycl_global_device
38- 0 , // sycl_global_host
39- 0 , // sycl_local
40- 0 , // sycl_private
41- 0 , // ptr32_sptr
42- 0 , // ptr32_uptr
43- 0 , // ptr64
44- 3 , // hlsl_groupshared
36+ 0 , // sycl_global
37+ 0 , // sycl_global_device
38+ 0 , // sycl_global_host
39+ 0 , // sycl_local
40+ 0 , // sycl_private
41+ 0 , // ptr32_sptr
42+ 0 , // ptr32_uptr
43+ 0 , // ptr64
44+ 3 , // hlsl_groupshared
45+ 10 , // hlsl_private
4546 // Wasm address space values for this target are dummy values,
4647 // as it is only enabled for Wasm targets.
4748 20 , // wasm_funcref
Original file line number Diff line number Diff line change @@ -46,6 +46,7 @@ static const unsigned NVPTXAddrSpaceMap[] = {
4646 0 , // ptr32_uptr
4747 0 , // ptr64
4848 0 , // hlsl_groupshared
49+ 0 , // hlsl_private
4950 // Wasm address space values for this target are dummy values,
5051 // as it is only enabled for Wasm targets.
5152 20 , // wasm_funcref
Original file line number Diff line number Diff line change @@ -38,15 +38,16 @@ static const unsigned SPIRDefIsPrivMap[] = {
3838 0 , // cuda_constant
3939 0 , // cuda_shared
4040 // SYCL address space values for this map are dummy
41- 0 , // sycl_global
42- 0 , // sycl_global_device
43- 0 , // sycl_global_host
44- 0 , // sycl_local
45- 0 , // sycl_private
46- 0 , // ptr32_sptr
47- 0 , // ptr32_uptr
48- 0 , // ptr64
49- 0 , // hlsl_groupshared
41+ 0 , // sycl_global
42+ 0 , // sycl_global_device
43+ 0 , // sycl_global_host
44+ 0 , // sycl_local
45+ 0 , // sycl_private
46+ 0 , // ptr32_sptr
47+ 0 , // ptr32_uptr
48+ 0 , // ptr64
49+ 0 , // hlsl_groupshared
50+ 10 , // hlsl_private
5051 // Wasm address space values for this target are dummy values,
5152 // as it is only enabled for Wasm targets.
5253 20 , // wasm_funcref
@@ -69,17 +70,18 @@ static const unsigned SPIRDefIsGenMap[] = {
6970 // cuda_constant pointer can be casted to default/"flat" pointer, but in
7071 // SPIR-V casts between constant and generic pointers are not allowed. For
7172 // this reason cuda_constant is mapped to SPIR-V CrossWorkgroup.
72- 1 , // cuda_constant
73- 3 , // cuda_shared
74- 1 , // sycl_global
75- 5 , // sycl_global_device
76- 6 , // sycl_global_host
77- 3 , // sycl_local
78- 0 , // sycl_private
79- 0 , // ptr32_sptr
80- 0 , // ptr32_uptr
81- 0 , // ptr64
82- 0 , // hlsl_groupshared
73+ 1 , // cuda_constant
74+ 3 , // cuda_shared
75+ 1 , // sycl_global
76+ 5 , // sycl_global_device
77+ 6 , // sycl_global_host
78+ 3 , // sycl_local
79+ 0 , // sycl_private
80+ 0 , // ptr32_sptr
81+ 0 , // ptr32_uptr
82+ 0 , // ptr64
83+ 0 , // hlsl_groupshared
84+ 10 , // hlsl_private
8385 // Wasm address space values for this target are dummy values,
8486 // as it is only enabled for Wasm targets.
8587 20 , // wasm_funcref
Original file line number Diff line number Diff line change @@ -42,6 +42,7 @@ static const unsigned ZOSAddressMap[] = {
4242 1 , // ptr32_uptr
4343 0 , // ptr64
4444 0 , // hlsl_groupshared
45+ 0 , // hlsl_private
4546 0 // wasm_funcref
4647};
4748
Original file line number Diff line number Diff line change @@ -51,6 +51,7 @@ static const unsigned TCEOpenCLAddrSpaceMap[] = {
5151 0 , // ptr32_uptr
5252 0 , // ptr64
5353 0 , // hlsl_groupshared
54+ 0 , // hlsl_private
5455 // Wasm address space values for this target are dummy values,
5556 // as it is only enabled for Wasm targets.
5657 20 , // wasm_funcref
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