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Run DCE after a LoopFlatten test to reduce spurious output [nfc]
LoopFlatten uses IndVars mechanics to widen induction variables, but then fails to cleanup the dead instructions returned via the API. This isn't a functional problem, but means that this test is highly sensative to indvars internals in an unhelpful way. Use DCE to "normalize" the test output to avoid false positives in a later change.
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‎llvm/test/Transforms/LoopFlatten/widen-iv.ll‎

Lines changed: 10 additions & 77 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,11 @@
11
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
22

3-
; RUN: opt < %s -S -passes='loop-simplify,loop(loop-flatten),verify' -loop-flatten-widen-iv=true \
3+
; RUN: opt < %s -S -passes='loop-simplify,loop(loop-flatten),dce,verify' -loop-flatten-widen-iv=true \
44
; RUN: -verify-loop-info -verify-dom-info -verify-scev \
55
; RUN: -loop-flatten-cost-threshold=6 | \
66
; RUN: FileCheck %s --check-prefix=CHECK
77

8-
; RUN: opt < %s -S -passes='loop-simplify,loop(loop-flatten),verify' -loop-flatten-widen-iv=false \
8+
; RUN: opt < %s -S -passes='loop-simplify,loop(loop-flatten),dce,verify' -loop-flatten-widen-iv=false \
99
; RUN: -verify-loop-info -verify-dom-info -verify-scev | \
1010
; RUN: FileCheck %s --check-prefix=DONTWIDEN
1111

@@ -30,19 +30,12 @@ define void @foo(ptr %A, i32 %N, i32 %M) {
3030
; CHECK-NEXT: br label [[FOR_COND1_PREHEADER_US:%.*]]
3131
; CHECK: for.cond1.preheader.us:
3232
; CHECK-NEXT: [[INDVAR1:%.*]] = phi i64 [ [[INDVAR_NEXT2:%.*]], [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US:%.*]] ], [ 0, [[FOR_COND1_PREHEADER_US_PREHEADER]] ]
33-
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[INDVAR1]] to i32
34-
; CHECK-NEXT: [[MUL_US:%.*]] = mul nsw i32 [[TMP2]], [[M]]
3533
; CHECK-NEXT: [[FLATTEN_TRUNCIV:%.*]] = trunc i64 [[INDVAR1]] to i32
3634
; CHECK-NEXT: br label [[FOR_BODY4_US:%.*]]
3735
; CHECK: for.body4.us:
38-
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER_US]] ]
39-
; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[INDVAR]] to i32
40-
; CHECK-NEXT: [[ADD_US:%.*]] = add nsw i32 [[TMP3]], [[MUL_US]]
4136
; CHECK-NEXT: [[IDXPROM_US:%.*]] = sext i32 [[FLATTEN_TRUNCIV]] to i64
4237
; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[IDXPROM_US]]
4338
; CHECK-NEXT: tail call void @f(ptr [[ARRAYIDX_US]])
44-
; CHECK-NEXT: [[INDVAR_NEXT:%.*]] = add i64 [[INDVAR]], 1
45-
; CHECK-NEXT: [[CMP2_US:%.*]] = icmp slt i64 [[INDVAR_NEXT]], [[TMP0]]
4639
; CHECK-NEXT: br label [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US]]
4740
; CHECK: for.cond1.for.cond.cleanup3_crit_edge.us:
4841
; CHECK-NEXT: [[INDVAR_NEXT2]] = add i64 [[INDVAR1]], 1
@@ -140,32 +133,17 @@ define void @foo2_sext(i32* nocapture readonly %A, i32 %N, i32 %M) {
140133
; CHECK-NEXT: br label [[FOR_COND1_PREHEADER:%.*]]
141134
; CHECK: for.cond1.preheader.us.preheader:
142135
; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[M]] to i64
143-
; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[M]] to i64
144-
; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[N]] to i64
145-
; CHECK-NEXT: [[FLATTEN_TRIPCOUNT:%.*]] = mul i64 [[TMP0]], [[TMP2]]
136+
; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[N]] to i64
137+
; CHECK-NEXT: [[FLATTEN_TRIPCOUNT:%.*]] = mul i64 [[TMP0]], [[TMP1]]
146138
; CHECK-NEXT: br label [[FOR_COND1_PREHEADER_US:%.*]]
147139
; CHECK: for.cond1.preheader.us:
148140
; CHECK-NEXT: [[INDVAR2:%.*]] = phi i64 [ [[INDVAR_NEXT3:%.*]], [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US:%.*]] ], [ 0, [[FOR_COND1_PREHEADER_US_PREHEADER]] ]
149141
; CHECK-NEXT: [[I_018_US:%.*]] = phi i32 [ [[INC6_US:%.*]], [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US]] ], [ 0, [[FOR_COND1_PREHEADER_US_PREHEADER]] ]
150-
; CHECK-NEXT: [[TMP3:%.*]] = mul nsw i64 [[INDVAR2]], [[TMP1]]
151-
; CHECK-NEXT: [[MUL_US:%.*]] = mul nsw i32 [[I_018_US]], [[M]]
152-
; CHECK-NEXT: [[TMP4:%.*]] = sext i32 [[MUL_US]] to i64
153-
; CHECK-NEXT: [[FLATTEN_TRUNCIV:%.*]] = trunc i64 [[INDVAR2]] to i32
154142
; CHECK-NEXT: br label [[FOR_BODY4_US:%.*]]
155143
; CHECK: for.body4.us:
156-
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER_US]] ]
157-
; CHECK-NEXT: [[J_016_US:%.*]] = phi i32 [ 0, [[FOR_COND1_PREHEADER_US]] ]
158-
; CHECK-NEXT: [[TMP5:%.*]] = add nsw i64 [[INDVAR]], [[TMP3]]
159-
; CHECK-NEXT: [[TMP6:%.*]] = sext i32 [[J_016_US]] to i64
160-
; CHECK-NEXT: [[TMP7:%.*]] = add nsw i64 [[TMP6]], [[TMP3]]
161-
; CHECK-NEXT: [[ADD_US:%.*]] = add nsw i32 [[J_016_US]], [[MUL_US]]
162-
; CHECK-NEXT: [[IDXPROM_US:%.*]] = sext i32 [[FLATTEN_TRUNCIV]] to i64
163144
; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVAR2]]
164-
; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[ARRAYIDX_US]], align 4
165-
; CHECK-NEXT: tail call void @g(i32 [[TMP8]])
166-
; CHECK-NEXT: [[INDVAR_NEXT:%.*]] = add i64 [[INDVAR]], 1
167-
; CHECK-NEXT: [[INC_US:%.*]] = add nuw nsw i32 [[J_016_US]], 1
168-
; CHECK-NEXT: [[CMP2_US:%.*]] = icmp slt i64 [[INDVAR_NEXT]], [[TMP0]]
145+
; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX_US]], align 4
146+
; CHECK-NEXT: tail call void @g(i32 [[TMP2]])
169147
; CHECK-NEXT: br label [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US]]
170148
; CHECK: for.cond1.for.cond.cleanup3_crit_edge.us:
171149
; CHECK-NEXT: [[INDVAR_NEXT3]] = add i64 [[INDVAR2]], 1
@@ -300,20 +278,13 @@ define void @foo2_zext(i32* nocapture readonly %A, i32 %N, i32 %M) {
300278
; CHECK-NEXT: br label [[FOR_COND1_PREHEADER:%.*]]
301279
; CHECK: for.cond1.preheader.us:
302280
; CHECK-NEXT: [[INDVAR1:%.*]] = phi i64 [ [[INDVAR_NEXT2:%.*]], [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US:%.*]] ], [ 0, [[FOR_COND1_PREHEADER_US_PREHEADER]] ]
303-
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[INDVAR1]] to i32
304-
; CHECK-NEXT: [[MUL_US:%.*]] = mul i32 [[TMP2]], [[M]]
305281
; CHECK-NEXT: [[FLATTEN_TRUNCIV:%.*]] = trunc i64 [[INDVAR1]] to i32
306282
; CHECK-NEXT: br label [[FOR_BODY4_US:%.*]]
307283
; CHECK: for.body4.us:
308-
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER_US]] ]
309-
; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[INDVAR]] to i32
310-
; CHECK-NEXT: [[ADD_US:%.*]] = add i32 [[TMP3]], [[MUL_US]]
311284
; CHECK-NEXT: [[IDXPROM_US:%.*]] = zext i32 [[FLATTEN_TRUNCIV]] to i64
312285
; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[IDXPROM_US]]
313-
; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[ARRAYIDX_US]], align 4
314-
; CHECK-NEXT: tail call void @g(i32 [[TMP4]])
315-
; CHECK-NEXT: [[INDVAR_NEXT:%.*]] = add i64 [[INDVAR]], 1
316-
; CHECK-NEXT: [[CMP2_US:%.*]] = icmp ult i64 [[INDVAR_NEXT]], [[TMP0]]
286+
; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX_US]], align 4
287+
; CHECK-NEXT: tail call void @g(i32 [[TMP2]])
317288
; CHECK-NEXT: br label [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US]]
318289
; CHECK: for.cond1.for.cond.cleanup3_crit_edge.us:
319290
; CHECK-NEXT: [[INDVAR_NEXT2]] = add i64 [[INDVAR1]], 1
@@ -435,21 +406,14 @@ define void @zext(i32 %N, ptr nocapture %A, i16 %val) {
435406
; CHECK-NEXT: br label [[FOR_COND1_PREHEADER_US:%.*]]
436407
; CHECK: for.cond1.preheader.us:
437408
; CHECK-NEXT: [[INDVAR1:%.*]] = phi i64 [ [[INDVAR_NEXT2:%.*]], [[FOR_COND1_FOR_INC7_CRIT_EDGE_US:%.*]] ], [ 0, [[FOR_COND1_PREHEADER_US_PREHEADER]] ]
438-
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[INDVAR1]] to i32
439-
; CHECK-NEXT: [[MUL_US:%.*]] = mul i32 [[TMP2]], [[N]]
440409
; CHECK-NEXT: [[FLATTEN_TRUNCIV:%.*]] = trunc i64 [[INDVAR1]] to i32
441410
; CHECK-NEXT: br label [[FOR_BODY3_US:%.*]]
442411
; CHECK: for.body3.us:
443-
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER_US]] ]
444-
; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[INDVAR]] to i32
445-
; CHECK-NEXT: [[ADD_US:%.*]] = add i32 [[TMP3]], [[MUL_US]]
446412
; CHECK-NEXT: [[IDXPROM_US:%.*]] = zext i32 [[FLATTEN_TRUNCIV]] to i64
447413
; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i16, ptr [[A:%.*]], i64 [[IDXPROM_US]]
448-
; CHECK-NEXT: [[TMP4:%.*]] = load i16, ptr [[ARRAYIDX_US]], align 2
449-
; CHECK-NEXT: [[ADD5_US:%.*]] = add i16 [[TMP4]], [[VAL:%.*]]
414+
; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[ARRAYIDX_US]], align 2
415+
; CHECK-NEXT: [[ADD5_US:%.*]] = add i16 [[TMP2]], [[VAL:%.*]]
450416
; CHECK-NEXT: store i16 [[ADD5_US]], ptr [[ARRAYIDX_US]], align 2
451-
; CHECK-NEXT: [[INDVAR_NEXT:%.*]] = add i64 [[INDVAR]], 1
452-
; CHECK-NEXT: [[CMP2_US:%.*]] = icmp ult i64 [[INDVAR_NEXT]], [[TMP0]]
453417
; CHECK-NEXT: br label [[FOR_COND1_FOR_INC7_CRIT_EDGE_US]]
454418
; CHECK: for.cond1.for.inc7_crit_edge.us:
455419
; CHECK-NEXT: [[INDVAR_NEXT2]] = add i64 [[INDVAR1]], 1
@@ -553,18 +517,11 @@ define void @test(i8 %n, i8 %m) {
553517
; CHECK-NEXT: br label [[FOR_COND3_PREHEADER_US:%.*]]
554518
; CHECK: for.cond3.preheader.us:
555519
; CHECK-NEXT: [[INDVAR2:%.*]] = phi i64 [ [[INDVAR_NEXT3:%.*]], [[FOR_COND3_FOR_COND_CLEANUP8_CRIT_EDGE_US:%.*]] ], [ 0, [[FOR_COND3_PREHEADER_US_PREHEADER]] ]
556-
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[INDVAR2]] to i8
557-
; CHECK-NEXT: [[MUL_US:%.*]] = mul i8 [[TMP2]], [[M]]
558520
; CHECK-NEXT: [[FLATTEN_TRUNCIV:%.*]] = trunc i64 [[INDVAR2]] to i8
559521
; CHECK-NEXT: br label [[FOR_BODY9_US:%.*]]
560522
; CHECK: for.body9.us:
561-
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[FOR_COND3_PREHEADER_US]] ]
562-
; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[INDVAR]] to i8
563-
; CHECK-NEXT: [[ADD_US:%.*]] = add i8 [[TMP3]], [[MUL_US]]
564523
; CHECK-NEXT: [[CONV14_US:%.*]] = zext i8 [[FLATTEN_TRUNCIV]] to i32
565524
; CHECK-NEXT: [[CALL_US:%.*]] = tail call i32 @use_32(i32 [[CONV14_US]])
566-
; CHECK-NEXT: [[INDVAR_NEXT:%.*]] = add i64 [[INDVAR]], 1
567-
; CHECK-NEXT: [[CMP6_US:%.*]] = icmp ult i64 [[INDVAR_NEXT]], [[TMP0]]
568525
; CHECK-NEXT: br label [[FOR_COND3_FOR_COND_CLEANUP8_CRIT_EDGE_US]]
569526
; CHECK: for.cond3.for.cond.cleanup8_crit_edge.us:
570527
; CHECK-NEXT: [[INDVAR_NEXT3]] = add i64 [[INDVAR2]], 1
@@ -695,14 +652,9 @@ define void @test3(i8 %n, i8 %m) {
695652
; CHECK-NEXT: br label [[FOR_COND3_PREHEADER_US:%.*]]
696653
; CHECK: for.cond3.preheader.us:
697654
; CHECK-NEXT: [[INDVAR2:%.*]] = phi i64 [ [[INDVAR_NEXT3:%.*]], [[FOR_COND3_FOR_COND_CLEANUP8_CRIT_EDGE_US:%.*]] ], [ 0, [[FOR_COND3_PREHEADER_US_PREHEADER]] ]
698-
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[INDVAR2]] to i8
699-
; CHECK-NEXT: [[MUL_US:%.*]] = mul i8 [[TMP2]], [[M]]
700655
; CHECK-NEXT: [[FLATTEN_TRUNCIV:%.*]] = trunc i64 [[INDVAR2]] to i8
701656
; CHECK-NEXT: br label [[FOR_BODY9_US:%.*]]
702657
; CHECK: for.body9.us:
703-
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[FOR_COND3_PREHEADER_US]] ]
704-
; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[INDVAR]] to i8
705-
; CHECK-NEXT: [[ADD_US:%.*]] = add i8 [[TMP3]], [[MUL_US]]
706658
; CHECK-NEXT: [[CONV14_US:%.*]] = zext i8 [[FLATTEN_TRUNCIV]] to i32
707659
; CHECK-NEXT: [[CALL_US:%.*]] = tail call i32 @use_32(i32 [[CONV14_US]])
708660
; CHECK-NEXT: [[CONV15_US:%.*]] = zext i8 [[FLATTEN_TRUNCIV]] to i16
@@ -711,8 +663,6 @@ define void @test3(i8 %n, i8 %m) {
711663
; CHECK-NEXT: [[CALL20_US:%.*]] = tail call i32 @use_16(i16 [[CONV15_US]])
712664
; CHECK-NEXT: [[CONV21_US:%.*]] = zext i8 [[FLATTEN_TRUNCIV]] to i64
713665
; CHECK-NEXT: [[CALL22_US:%.*]] = tail call i32 @use_64(i64 [[CONV21_US]])
714-
; CHECK-NEXT: [[INDVAR_NEXT:%.*]] = add i64 [[INDVAR]], 1
715-
; CHECK-NEXT: [[CMP6_US:%.*]] = icmp ult i64 [[INDVAR_NEXT]], [[TMP0]]
716666
; CHECK-NEXT: br label [[FOR_COND3_FOR_COND_CLEANUP8_CRIT_EDGE_US]]
717667
; CHECK: for.cond3.for.cond.cleanup8_crit_edge.us:
718668
; CHECK-NEXT: [[INDVAR_NEXT3]] = add i64 [[INDVAR2]], 1
@@ -855,23 +805,16 @@ define void @test4(i16 %n, i16 %m) {
855805
; CHECK-NEXT: br label [[FOR_COND3_PREHEADER_US:%.*]]
856806
; CHECK: for.cond3.preheader.us:
857807
; CHECK-NEXT: [[INDVAR2:%.*]] = phi i64 [ [[INDVAR_NEXT3:%.*]], [[FOR_COND3_FOR_COND_CLEANUP8_CRIT_EDGE_US:%.*]] ], [ 0, [[FOR_COND3_PREHEADER_US_PREHEADER]] ]
858-
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[INDVAR2]] to i16
859-
; CHECK-NEXT: [[MUL_US:%.*]] = mul i16 [[TMP2]], [[M]]
860808
; CHECK-NEXT: [[FLATTEN_TRUNCIV:%.*]] = trunc i64 [[INDVAR2]] to i16
861809
; CHECK-NEXT: br label [[FOR_BODY9_US:%.*]]
862810
; CHECK: for.body9.us:
863-
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[FOR_COND3_PREHEADER_US]] ]
864-
; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[INDVAR]] to i16
865-
; CHECK-NEXT: [[ADD_US:%.*]] = add i16 [[TMP3]], [[MUL_US]]
866811
; CHECK-NEXT: [[CONV14_US:%.*]] = sext i16 [[FLATTEN_TRUNCIV]] to i32
867812
; CHECK-NEXT: [[CALL_US:%.*]] = tail call i32 @use_32(i32 [[CONV14_US]])
868813
; CHECK-NEXT: [[CALL15_US:%.*]] = tail call i32 @use_16(i16 [[FLATTEN_TRUNCIV]])
869814
; CHECK-NEXT: [[CALL17_US:%.*]] = tail call i32 @use_32(i32 [[CONV14_US]])
870815
; CHECK-NEXT: [[CALL18_US:%.*]] = tail call i32 @use_16(i16 [[FLATTEN_TRUNCIV]])
871816
; CHECK-NEXT: [[CONV19_US:%.*]] = sext i16 [[FLATTEN_TRUNCIV]] to i64
872817
; CHECK-NEXT: [[CALL20_US:%.*]] = tail call i32 @use_64(i64 [[CONV19_US]])
873-
; CHECK-NEXT: [[INDVAR_NEXT:%.*]] = add i64 [[INDVAR]], 1
874-
; CHECK-NEXT: [[CMP6_US:%.*]] = icmp slt i64 [[INDVAR_NEXT]], [[TMP0]]
875818
; CHECK-NEXT: br label [[FOR_COND3_FOR_COND_CLEANUP8_CRIT_EDGE_US]]
876819
; CHECK: for.cond3.for.cond.cleanup8_crit_edge.us:
877820
; CHECK-NEXT: [[INDVAR_NEXT3]] = add i64 [[INDVAR2]], 1
@@ -991,10 +934,7 @@ define i32 @constTripCount() {
991934
; CHECK-NEXT: [[INDVAR1:%.*]] = phi i64 [ [[INDVAR_NEXT2:%.*]], [[J_LOOPDONE:%.*]] ], [ 0, [[ENTRY:%.*]] ]
992935
; CHECK-NEXT: br label [[J_LOOP:%.*]]
993936
; CHECK: j.loop:
994-
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[I_LOOP]] ]
995937
; CHECK-NEXT: call void @payload()
996-
; CHECK-NEXT: [[INDVAR_NEXT:%.*]] = add i64 [[INDVAR]], 1
997-
; CHECK-NEXT: [[J_ATEND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], 20
998938
; CHECK-NEXT: br label [[J_LOOPDONE]]
999939
; CHECK: j.loopdone:
1000940
; CHECK-NEXT: [[INDVAR_NEXT2]] = add i64 [[INDVAR1]], 1
@@ -1063,19 +1003,12 @@ define void @foo_M_sext(ptr %A, i32 %N, i16 %M) {
10631003
; CHECK-NEXT: br label [[FOR_COND1_PREHEADER_US:%.*]]
10641004
; CHECK: for.cond1.preheader.us:
10651005
; CHECK-NEXT: [[INDVAR1:%.*]] = phi i64 [ [[INDVAR_NEXT2:%.*]], [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US:%.*]] ], [ 0, [[FOR_COND1_PREHEADER_US_PREHEADER]] ]
1066-
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[INDVAR1]] to i32
1067-
; CHECK-NEXT: [[MUL_US:%.*]] = mul nsw i32 [[TMP2]], [[M2]]
10681006
; CHECK-NEXT: [[FLATTEN_TRUNCIV:%.*]] = trunc i64 [[INDVAR1]] to i32
10691007
; CHECK-NEXT: br label [[FOR_BODY4_US:%.*]]
10701008
; CHECK: for.body4.us:
1071-
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER_US]] ]
1072-
; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[INDVAR]] to i32
1073-
; CHECK-NEXT: [[ADD_US:%.*]] = add nsw i32 [[TMP3]], [[MUL_US]]
10741009
; CHECK-NEXT: [[IDXPROM_US:%.*]] = sext i32 [[FLATTEN_TRUNCIV]] to i64
10751010
; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[IDXPROM_US]]
10761011
; CHECK-NEXT: tail call void @f(ptr [[ARRAYIDX_US]])
1077-
; CHECK-NEXT: [[INDVAR_NEXT:%.*]] = add i64 [[INDVAR]], 1
1078-
; CHECK-NEXT: [[CMP2_US:%.*]] = icmp slt i64 [[INDVAR_NEXT]], [[TMP0]]
10791012
; CHECK-NEXT: br label [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US]]
10801013
; CHECK: for.cond1.for.cond.cleanup3_crit_edge.us:
10811014
; CHECK-NEXT: [[INDVAR_NEXT2]] = add i64 [[INDVAR1]], 1

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