@@ -386,6 +386,95 @@ exit:
386
386
ret void
387
387
}
388
388
389
+
390
+ declare i1 @cond ()
391
+
392
+ define void @scev_exp_reuse_const_add (ptr %dst , ptr %src ) {
393
+ ; CHECK-LABEL: define void @scev_exp_reuse_const_add(
394
+ ; CHECK-SAME: ptr [[DST:%.*]], ptr [[SRC:%.*]]) {
395
+ ; CHECK-NEXT: [[ENTRY:.*]]:
396
+ ; CHECK-NEXT: [[SRC2:%.*]] = ptrtoint ptr [[SRC]] to i64
397
+ ; CHECK-NEXT: [[DST1:%.*]] = ptrtoint ptr [[DST]] to i64
398
+ ; CHECK-NEXT: br label %[[LOOP_1:.*]]
399
+ ; CHECK: [[LOOP_1]]:
400
+ ; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[INDVAR_NEXT:%.*]], %[[LOOP_1]] ], [ 0, %[[ENTRY]] ]
401
+ ; CHECK-NEXT: [[PTR_IV_1:%.*]] = phi ptr [ [[DST]], %[[ENTRY]] ], [ [[PTR_IV_1_NEXT:%.*]], %[[LOOP_1]] ]
402
+ ; CHECK-NEXT: [[PTR_IV_1_NEXT]] = getelementptr i8, ptr [[PTR_IV_1]], i64 2
403
+ ; CHECK-NEXT: [[C:%.*]] = call i1 @cond()
404
+ ; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
405
+ ; CHECK-NEXT: br i1 [[C]], label %[[LOOP_2_PH:.*]], label %[[LOOP_1]]
406
+ ; CHECK: [[LOOP_2_PH]]:
407
+ ; CHECK-NEXT: [[INDVAR_LCSSA:%.*]] = phi i64 [ [[INDVAR]], %[[LOOP_1]] ]
408
+ ; CHECK-NEXT: [[PTR_IV_1_NEXT_LCSSA:%.*]] = phi ptr [ [[PTR_IV_1_NEXT]], %[[LOOP_1]] ]
409
+ ; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
410
+ ; CHECK: [[VECTOR_MEMCHECK]]:
411
+ ; CHECK-NEXT: [[TMP0:%.*]] = sub i64 [[DST1]], [[SRC2]]
412
+ ; CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDVAR_LCSSA]], 1
413
+ ; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], [[TMP0]]
414
+ ; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], 4
415
+ ; CHECK-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
416
+ ; CHECK: [[VECTOR_PH]]:
417
+ ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[PTR_IV_1_NEXT_LCSSA]], i64 80
418
+ ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
419
+ ; CHECK: [[VECTOR_BODY]]:
420
+ ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
421
+ ; CHECK-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 2
422
+ ; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[PTR_IV_1_NEXT_LCSSA]], i64 [[OFFSET_IDX]]
423
+ ; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[INDEX]], 1
424
+ ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i16, ptr [[SRC]], i64 [[TMP4]]
425
+ ; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i16, ptr [[TMP5]], i32 0
426
+ ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i16>, ptr [[TMP6]], align 2
427
+ ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i16, ptr [[NEXT_GEP]], i32 0
428
+ ; CHECK-NEXT: store <2 x i16> [[WIDE_LOAD]], ptr [[TMP7]], align 2
429
+ ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
430
+ ; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 40
431
+ ; CHECK-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
432
+ ; CHECK: [[MIDDLE_BLOCK]]:
433
+ ; CHECK-NEXT: br i1 false, label %[[EXIT:.*]], label %[[SCALAR_PH]]
434
+ ; CHECK: [[SCALAR_PH]]:
435
+ ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 40, %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_2_PH]] ], [ 0, %[[VECTOR_MEMCHECK]] ]
436
+ ; CHECK-NEXT: [[BC_RESUME_VAL3:%.*]] = phi ptr [ [[TMP3]], %[[MIDDLE_BLOCK]] ], [ [[PTR_IV_1_NEXT_LCSSA]], %[[LOOP_2_PH]] ], [ [[PTR_IV_1_NEXT_LCSSA]], %[[VECTOR_MEMCHECK]] ]
437
+ ; CHECK-NEXT: br label %[[LOOP_2:.*]]
438
+ ; CHECK: [[LOOP_2]]:
439
+ ; CHECK-NEXT: [[IV_1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_2_NEXT:%.*]], %[[LOOP_2]] ]
440
+ ; CHECK-NEXT: [[PTR_IV_2:%.*]] = phi ptr [ [[BC_RESUME_VAL3]], %[[SCALAR_PH]] ], [ [[PTR_IV_2_NEXT:%.*]], %[[LOOP_2]] ]
441
+ ; CHECK-NEXT: [[IV_2_NEXT]] = add i64 [[IV_1]], 1
442
+ ; CHECK-NEXT: [[GEP_SRC_1:%.*]] = getelementptr i16, ptr [[SRC]], i64 [[IV_2_NEXT]]
443
+ ; CHECK-NEXT: [[L:%.*]] = load i16, ptr [[GEP_SRC_1]], align 2
444
+ ; CHECK-NEXT: [[PTR_IV_2_NEXT]] = getelementptr i8, ptr [[PTR_IV_2]], i64 2
445
+ ; CHECK-NEXT: store i16 [[L]], ptr [[PTR_IV_2]], align 2
446
+ ; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_1]], 40
447
+ ; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP_2]], !llvm.loop [[LOOP11:![0-9]+]]
448
+ ; CHECK: [[EXIT]]:
449
+ ; CHECK-NEXT: ret void
450
+ ;
451
+ entry:
452
+ br label %loop.1
453
+
454
+ loop.1 :
455
+ %ptr.iv.1 = phi ptr [ %dst , %entry ], [ %ptr.iv.1.next , %loop.1 ]
456
+ %ptr.iv.1.next = getelementptr i8 , ptr %ptr.iv.1 , i64 2
457
+ %c = call i1 @cond ()
458
+ br i1 %c , label %loop.2.ph , label %loop.1
459
+
460
+ loop.2 .ph:
461
+ br label %loop.2
462
+
463
+ loop.2 :
464
+ %iv.1 = phi i64 [ 0 , %loop.2.ph ], [ %iv.2.next , %loop.2 ]
465
+ %ptr.iv.2 = phi ptr [ %ptr.iv.1.next , %loop.2.ph ], [ %ptr.iv.2.next , %loop.2 ]
466
+ %iv.2.next = add i64 %iv.1 , 1
467
+ %gep.src.1 = getelementptr i16 , ptr %src , i64 %iv.2.next
468
+ %l = load i16 , ptr %gep.src.1 , align 2
469
+ %ptr.iv.2.next = getelementptr i8 , ptr %ptr.iv.2 , i64 2
470
+ store i16 %l , ptr %ptr.iv.2 , align 2
471
+ %ec = icmp eq i64 %iv.1 , 40
472
+ br i1 %ec , label %exit , label %loop.2
473
+
474
+ exit:
475
+ ret void
476
+ }
477
+
389
478
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
390
479
declare double @llvm.cos.f64 (double ) #0
391
480
0 commit comments