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updated subtests name in accordance to usage of Hex floating values.
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‎llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll‎

Lines changed: 45 additions & 45 deletions
Original file line numberDiff line numberDiff line change
@@ -266,8 +266,8 @@ define float @fmul_select_f32_test6(float %x, i32 %bool.arg1, i32 %bool.arg2) {
266266
ret float %ldexp
267267
}
268268

269-
define float @fmul_select_f32_test7(float %x, i32 %bool.arg1, i32 %bool.arg2) {
270-
; GFX7-LABEL: fmul_select_f32_test7:
269+
define float @fmul_select_f32_test7_sel_log2val_pos59_pos92(float %x, i32 %bool.arg1, i32 %bool.arg2) {
270+
; GFX7-LABEL: fmul_select_f32_test7_sel_log2val_pos59_pos92:
271271
; GFX7: ; %bb.0:
272272
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
273273
; GFX7-NEXT: v_mov_b32_e32 v3, 0x6d800000
@@ -277,7 +277,7 @@ define float @fmul_select_f32_test7(float %x, i32 %bool.arg1, i32 %bool.arg2) {
277277
; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1
278278
; GFX7-NEXT: s_setpc_b64 s[30:31]
279279
;
280-
; GFX9-LABEL: fmul_select_f32_test7:
280+
; GFX9-LABEL: fmul_select_f32_test7_sel_log2val_pos59_pos92:
281281
; GFX9: ; %bb.0:
282282
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
283283
; GFX9-NEXT: v_mov_b32_e32 v3, 0x6d800000
@@ -287,7 +287,7 @@ define float @fmul_select_f32_test7(float %x, i32 %bool.arg1, i32 %bool.arg2) {
287287
; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1
288288
; GFX9-NEXT: s_setpc_b64 s[30:31]
289289
;
290-
; GFX1030-LABEL: fmul_select_f32_test7:
290+
; GFX1030-LABEL: fmul_select_f32_test7_sel_log2val_pos59_pos92:
291291
; GFX1030: ; %bb.0:
292292
; GFX1030-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
293293
; GFX1030-NEXT: v_mov_b32_e32 v3, 0x5d000000
@@ -296,7 +296,7 @@ define float @fmul_select_f32_test7(float %x, i32 %bool.arg1, i32 %bool.arg2) {
296296
; GFX1030-NEXT: v_mul_f32_e32 v0, v0, v1
297297
; GFX1030-NEXT: s_setpc_b64 s[30:31]
298298
;
299-
; GFX1100-LABEL: fmul_select_f32_test7:
299+
; GFX1100-LABEL: fmul_select_f32_test7_sel_log2val_pos59_pos92:
300300
; GFX1100: ; %bb.0:
301301
; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
302302
; GFX1100-NEXT: v_mov_b32_e32 v3, 0x5d000000
@@ -436,8 +436,8 @@ define float @fmul_select_f32_test10(float %x, i32 %bool.arg1, i32 %bool.arg2) {
436436
ret float %ldexp
437437
}
438438

439-
define float @fmul_select_f32_test11(float %x, i32 %bool.arg1, i32 %bool.arg2) {
440-
; GFX7-LABEL: fmul_select_f32_test11:
439+
define float @fmul_select_f32_test11_sel_log2val_pos78_pos56(float %x, i32 %bool.arg1, i32 %bool.arg2) {
440+
; GFX7-LABEL: fmul_select_f32_test11_sel_log2val_pos78_pos56:
441441
; GFX7: ; %bb.0:
442442
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
443443
; GFX7-NEXT: v_mov_b32_e32 v3, 0xdb800000
@@ -447,7 +447,7 @@ define float @fmul_select_f32_test11(float %x, i32 %bool.arg1, i32 %bool.arg2) {
447447
; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1
448448
; GFX7-NEXT: s_setpc_b64 s[30:31]
449449
;
450-
; GFX9-LABEL: fmul_select_f32_test11:
450+
; GFX9-LABEL: fmul_select_f32_test11_sel_log2val_pos78_pos56:
451451
; GFX9: ; %bb.0:
452452
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
453453
; GFX9-NEXT: v_mov_b32_e32 v3, 0xdb800000
@@ -457,7 +457,7 @@ define float @fmul_select_f32_test11(float %x, i32 %bool.arg1, i32 %bool.arg2) {
457457
; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1
458458
; GFX9-NEXT: s_setpc_b64 s[30:31]
459459
;
460-
; GFX1030-LABEL: fmul_select_f32_test11:
460+
; GFX1030-LABEL: fmul_select_f32_test11_sel_log2val_pos78_pos56:
461461
; GFX1030: ; %bb.0:
462462
; GFX1030-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
463463
; GFX1030-NEXT: v_mov_b32_e32 v3, 0xe6800000
@@ -466,7 +466,7 @@ define float @fmul_select_f32_test11(float %x, i32 %bool.arg1, i32 %bool.arg2) {
466466
; GFX1030-NEXT: v_mul_f32_e32 v0, v0, v1
467467
; GFX1030-NEXT: s_setpc_b64 s[30:31]
468468
;
469-
; GFX1100-LABEL: fmul_select_f32_test11:
469+
; GFX1100-LABEL: fmul_select_f32_test11_sel_log2val_pos78_pos56:
470470
; GFX1100: ; %bb.0:
471471
; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
472472
; GFX1100-NEXT: v_mov_b32_e32 v3, 0xe6800000
@@ -481,8 +481,8 @@ define float @fmul_select_f32_test11(float %x, i32 %bool.arg1, i32 %bool.arg2) {
481481
ret float %ldexp
482482
}
483483

484-
define float @fmul_select_f32_test12(float %x, i32 %bool.arg1, i32 %bool.arg2) {
485-
; GFX7-LABEL: fmul_select_f32_test12:
484+
define float @fmul_select_f32_test12_sel_log2val_neg48_pos68(float %x, i32 %bool.arg1, i32 %bool.arg2) {
485+
; GFX7-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68:
486486
; GFX7: ; %bb.0:
487487
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
488488
; GFX7-NEXT: v_mov_b32_e32 v3, 0x61800000
@@ -492,7 +492,7 @@ define float @fmul_select_f32_test12(float %x, i32 %bool.arg1, i32 %bool.arg2) {
492492
; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1
493493
; GFX7-NEXT: s_setpc_b64 s[30:31]
494494
;
495-
; GFX9-LABEL: fmul_select_f32_test12:
495+
; GFX9-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68:
496496
; GFX9: ; %bb.0:
497497
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
498498
; GFX9-NEXT: v_mov_b32_e32 v3, 0x61800000
@@ -502,7 +502,7 @@ define float @fmul_select_f32_test12(float %x, i32 %bool.arg1, i32 %bool.arg2) {
502502
; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1
503503
; GFX9-NEXT: s_setpc_b64 s[30:31]
504504
;
505-
; GFX1030-LABEL: fmul_select_f32_test12:
505+
; GFX1030-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68:
506506
; GFX1030: ; %bb.0:
507507
; GFX1030-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
508508
; GFX1030-NEXT: v_mov_b32_e32 v3, 0x27800000
@@ -511,7 +511,7 @@ define float @fmul_select_f32_test12(float %x, i32 %bool.arg1, i32 %bool.arg2) {
511511
; GFX1030-NEXT: v_mul_f32_e32 v0, v0, v1
512512
; GFX1030-NEXT: s_setpc_b64 s[30:31]
513513
;
514-
; GFX1100-LABEL: fmul_select_f32_test12:
514+
; GFX1100-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68:
515515
; GFX1100: ; %bb.0:
516516
; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
517517
; GFX1100-NEXT: v_mov_b32_e32 v3, 0x27800000
@@ -1195,8 +1195,8 @@ define double @fmul_select_f64_test13(double %x, i32 %bool.arg1, i32 %bool.arg2)
11951195
ret double %ldexp
11961196
}
11971197

1198-
define double @fmul_select_f64_test14(double %x, i32 %bool.arg1, i32 %bool.arg2) {
1199-
; GFX7-LABEL: fmul_select_f64_test14:
1198+
define double @fmul_select_f64_test14_sel_log2val_pos92_neg27(double %x, i32 %bool.arg1, i32 %bool.arg2) {
1199+
; GFX7-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27:
12001200
; GFX7: ; %bb.0:
12011201
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12021202
; GFX7-NEXT: v_mov_b32_e32 v4, 0x3e400000
@@ -1207,7 +1207,7 @@ define double @fmul_select_f64_test14(double %x, i32 %bool.arg1, i32 %bool.arg2)
12071207
; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]
12081208
; GFX7-NEXT: s_setpc_b64 s[30:31]
12091209
;
1210-
; GFX9-LABEL: fmul_select_f64_test14:
1210+
; GFX9-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27:
12111211
; GFX9: ; %bb.0:
12121212
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12131213
; GFX9-NEXT: v_mov_b32_e32 v4, 0x3e400000
@@ -1218,7 +1218,7 @@ define double @fmul_select_f64_test14(double %x, i32 %bool.arg1, i32 %bool.arg2)
12181218
; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]
12191219
; GFX9-NEXT: s_setpc_b64 s[30:31]
12201220
;
1221-
; GFX1030-LABEL: fmul_select_f64_test14:
1221+
; GFX1030-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27:
12221222
; GFX1030: ; %bb.0:
12231223
; GFX1030-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12241224
; GFX1030-NEXT: v_mov_b32_e32 v5, 0x45b00000
@@ -1228,7 +1228,7 @@ define double @fmul_select_f64_test14(double %x, i32 %bool.arg1, i32 %bool.arg2)
12281228
; GFX1030-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]
12291229
; GFX1030-NEXT: s_setpc_b64 s[30:31]
12301230
;
1231-
; GFX1100-LABEL: fmul_select_f64_test14:
1231+
; GFX1100-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27:
12321232
; GFX1100: ; %bb.0:
12331233
; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12341234
; GFX1100-NEXT: v_dual_mov_b32 v5, 0x45b00000 :: v_dual_mov_b32 v4, 0
@@ -1243,8 +1243,8 @@ define double @fmul_select_f64_test14(double %x, i32 %bool.arg1, i32 %bool.arg2)
12431243
ret double %ldexp
12441244
}
12451245

1246-
define double @fmul_select_f64_test15(double %x, i32 %bool.arg1, i32 %bool.arg2) {
1247-
; GFX7-LABEL: fmul_select_f64_test15:
1246+
define double @fmul_select_f64_test15_sel_log2val_neg42_neg33(double %x, i32 %bool.arg1, i32 %bool.arg2) {
1247+
; GFX7-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33:
12481248
; GFX7: ; %bb.0:
12491249
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12501250
; GFX7-NEXT: v_mov_b32_e32 v4, 0x3de00000
@@ -1255,7 +1255,7 @@ define double @fmul_select_f64_test15(double %x, i32 %bool.arg1, i32 %bool.arg2)
12551255
; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]
12561256
; GFX7-NEXT: s_setpc_b64 s[30:31]
12571257
;
1258-
; GFX9-LABEL: fmul_select_f64_test15:
1258+
; GFX9-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33:
12591259
; GFX9: ; %bb.0:
12601260
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12611261
; GFX9-NEXT: v_mov_b32_e32 v4, 0x3de00000
@@ -1266,7 +1266,7 @@ define double @fmul_select_f64_test15(double %x, i32 %bool.arg1, i32 %bool.arg2)
12661266
; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]
12671267
; GFX9-NEXT: s_setpc_b64 s[30:31]
12681268
;
1269-
; GFX1030-LABEL: fmul_select_f64_test15:
1269+
; GFX1030-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33:
12701270
; GFX1030: ; %bb.0:
12711271
; GFX1030-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12721272
; GFX1030-NEXT: v_mov_b32_e32 v5, 0x3d500000
@@ -1276,7 +1276,7 @@ define double @fmul_select_f64_test15(double %x, i32 %bool.arg1, i32 %bool.arg2)
12761276
; GFX1030-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]
12771277
; GFX1030-NEXT: s_setpc_b64 s[30:31]
12781278
;
1279-
; GFX1100-LABEL: fmul_select_f64_test15:
1279+
; GFX1100-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33:
12801280
; GFX1100: ; %bb.0:
12811281
; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12821282
; GFX1100-NEXT: v_dual_mov_b32 v5, 0x3d500000 :: v_dual_mov_b32 v4, 0
@@ -1731,8 +1731,8 @@ define half @fmul_select_f16_test9(half %x, i32 %bool.arg1, i32 %bool.arg2) {
17311731
ret half %ldexp
17321732
}
17331733

1734-
define half @fmul_select_f16_test10(half %x, i32 %bool.arg1, i32 %bool.arg2) {
1735-
; GFX7-LABEL: fmul_select_f16_test10:
1734+
define half @fmul_select_f16_test10_sel_log2val_neg11_pos11(half %x, i32 %bool.arg1, i32 %bool.arg2) {
1735+
; GFX7-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11:
17361736
; GFX7: ; %bb.0:
17371737
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
17381738
; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
@@ -1744,7 +1744,7 @@ define half @fmul_select_f16_test10(half %x, i32 %bool.arg1, i32 %bool.arg2) {
17441744
; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1
17451745
; GFX7-NEXT: s_setpc_b64 s[30:31]
17461746
;
1747-
; GFX9-LABEL: fmul_select_f16_test10:
1747+
; GFX9-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11:
17481748
; GFX9: ; %bb.0:
17491749
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
17501750
; GFX9-NEXT: v_mov_b32_e32 v3, 0x6800
@@ -1754,7 +1754,7 @@ define half @fmul_select_f16_test10(half %x, i32 %bool.arg1, i32 %bool.arg2) {
17541754
; GFX9-NEXT: v_mul_f16_e32 v0, v0, v1
17551755
; GFX9-NEXT: s_setpc_b64 s[30:31]
17561756
;
1757-
; GFX1030-LABEL: fmul_select_f16_test10:
1757+
; GFX1030-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11:
17581758
; GFX1030: ; %bb.0:
17591759
; GFX1030-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
17601760
; GFX1030-NEXT: v_mov_b32_e32 v3, 0x1000
@@ -1763,7 +1763,7 @@ define half @fmul_select_f16_test10(half %x, i32 %bool.arg1, i32 %bool.arg2) {
17631763
; GFX1030-NEXT: v_mul_f16_e32 v0, v0, v1
17641764
; GFX1030-NEXT: s_setpc_b64 s[30:31]
17651765
;
1766-
; GFX1100-LABEL: fmul_select_f16_test10:
1766+
; GFX1100-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11:
17671767
; GFX1100: ; %bb.0:
17681768
; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
17691769
; GFX1100-NEXT: v_mov_b32_e32 v3, 0x1000
@@ -1778,8 +1778,8 @@ define half @fmul_select_f16_test10(half %x, i32 %bool.arg1, i32 %bool.arg2) {
17781778
ret half %ldexp
17791779
}
17801780

1781-
define half @fmul_select_f16_test11(half %x, i32 %bool.arg1, i32 %bool.arg2) {
1782-
; GFX7-LABEL: fmul_select_f16_test11:
1781+
define half @fmul_select_f16_test11_sel_log2val_pos7_neg14(half %x, i32 %bool.arg1, i32 %bool.arg2) {
1782+
; GFX7-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14:
17831783
; GFX7: ; %bb.0:
17841784
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
17851785
; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
@@ -1791,7 +1791,7 @@ define half @fmul_select_f16_test11(half %x, i32 %bool.arg1, i32 %bool.arg2) {
17911791
; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1
17921792
; GFX7-NEXT: s_setpc_b64 s[30:31]
17931793
;
1794-
; GFX9-LABEL: fmul_select_f16_test11:
1794+
; GFX9-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14:
17951795
; GFX9: ; %bb.0:
17961796
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
17971797
; GFX9-NEXT: v_mov_b32_e32 v3, 0x400
@@ -1801,7 +1801,7 @@ define half @fmul_select_f16_test11(half %x, i32 %bool.arg1, i32 %bool.arg2) {
18011801
; GFX9-NEXT: v_mul_f16_e32 v0, v0, v1
18021802
; GFX9-NEXT: s_setpc_b64 s[30:31]
18031803
;
1804-
; GFX1030-LABEL: fmul_select_f16_test11:
1804+
; GFX1030-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14:
18051805
; GFX1030: ; %bb.0:
18061806
; GFX1030-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
18071807
; GFX1030-NEXT: v_mov_b32_e32 v3, 0x5800
@@ -1810,7 +1810,7 @@ define half @fmul_select_f16_test11(half %x, i32 %bool.arg1, i32 %bool.arg2) {
18101810
; GFX1030-NEXT: v_mul_f16_e32 v0, v0, v1
18111811
; GFX1030-NEXT: s_setpc_b64 s[30:31]
18121812
;
1813-
; GFX1100-LABEL: fmul_select_f16_test11:
1813+
; GFX1100-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14:
18141814
; GFX1100: ; %bb.0:
18151815
; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
18161816
; GFX1100-NEXT: v_mov_b32_e32 v3, 0x5800
@@ -2567,8 +2567,8 @@ define bfloat @fmul_select_bf16_test9(bfloat %x, i32 %bool.arg1, i32 %bool.arg2)
25672567
ret bfloat %ldexp
25682568
}
25692569

2570-
define bfloat @fmul_select_bf16_test10(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) {
2571-
; GFX7-LABEL: fmul_select_bf16_test10:
2570+
define bfloat @fmul_select_bf16_test10_sel_log2val_pos65_pos56(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) {
2571+
; GFX7-LABEL: fmul_select_bf16_test10_sel_log2val_pos65_pos56:
25722572
; GFX7: ; %bb.0:
25732573
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
25742574
; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
@@ -2581,7 +2581,7 @@ define bfloat @fmul_select_bf16_test10(bfloat %x, i32 %bool.arg1, i32 %bool.arg2
25812581
; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
25822582
; GFX7-NEXT: s_setpc_b64 s[30:31]
25832583
;
2584-
; GFX9-LABEL: fmul_select_bf16_test10:
2584+
; GFX9-LABEL: fmul_select_bf16_test10_sel_log2val_pos65_pos56:
25852585
; GFX9: ; %bb.0:
25862586
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
25872587
; GFX9-NEXT: v_mov_b32_e32 v3, 0xffffdb80
@@ -2600,7 +2600,7 @@ define bfloat @fmul_select_bf16_test10(bfloat %x, i32 %bool.arg1, i32 %bool.arg2
26002600
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
26012601
; GFX9-NEXT: s_setpc_b64 s[30:31]
26022602
;
2603-
; GFX1030-LABEL: fmul_select_bf16_test10:
2603+
; GFX1030-LABEL: fmul_select_bf16_test10_sel_log2val_pos65_pos56:
26042604
; GFX1030: ; %bb.0:
26052605
; GFX1030-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
26062606
; GFX1030-NEXT: v_mov_b32_e32 v3, 0xffffe000
@@ -2617,7 +2617,7 @@ define bfloat @fmul_select_bf16_test10(bfloat %x, i32 %bool.arg1, i32 %bool.arg2
26172617
; GFX1030-NEXT: v_lshrrev_b32_e32 v0, 16, v0
26182618
; GFX1030-NEXT: s_setpc_b64 s[30:31]
26192619
;
2620-
; GFX1100-LABEL: fmul_select_bf16_test10:
2620+
; GFX1100-LABEL: fmul_select_bf16_test10_sel_log2val_pos65_pos56:
26212621
; GFX1100: ; %bb.0:
26222622
; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
26232623
; GFX1100-NEXT: v_dual_mov_b32 v3, 0xffffe000 :: v_dual_lshlrev_b32 v0, 16, v0
@@ -2642,8 +2642,8 @@ define bfloat @fmul_select_bf16_test10(bfloat %x, i32 %bool.arg1, i32 %bool.arg2
26422642
ret bfloat %ldexp
26432643
}
26442644

2645-
define bfloat @fmul_select_bf16_test11(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) {
2646-
; GFX7-LABEL: fmul_select_bf16_test11:
2645+
define bfloat @fmul_select_bf16_test11_sel_log2val_neg22_pos25(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) {
2646+
; GFX7-LABEL: fmul_select_bf16_test11_sel_log2val_neg22_pos25:
26472647
; GFX7: ; %bb.0:
26482648
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
26492649
; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
@@ -2656,7 +2656,7 @@ define bfloat @fmul_select_bf16_test11(bfloat %x, i32 %bool.arg1, i32 %bool.arg2
26562656
; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
26572657
; GFX7-NEXT: s_setpc_b64 s[30:31]
26582658
;
2659-
; GFX9-LABEL: fmul_select_bf16_test11:
2659+
; GFX9-LABEL: fmul_select_bf16_test11_sel_log2val_neg22_pos25:
26602660
; GFX9: ; %bb.0:
26612661
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
26622662
; GFX9-NEXT: v_mov_b32_e32 v3, 0x4c00
@@ -2675,7 +2675,7 @@ define bfloat @fmul_select_bf16_test11(bfloat %x, i32 %bool.arg1, i32 %bool.arg2
26752675
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
26762676
; GFX9-NEXT: s_setpc_b64 s[30:31]
26772677
;
2678-
; GFX1030-LABEL: fmul_select_bf16_test11:
2678+
; GFX1030-LABEL: fmul_select_bf16_test11_sel_log2val_neg22_pos25:
26792679
; GFX1030: ; %bb.0:
26802680
; GFX1030-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
26812681
; GFX1030-NEXT: v_mov_b32_e32 v3, 0x3480
@@ -2692,7 +2692,7 @@ define bfloat @fmul_select_bf16_test11(bfloat %x, i32 %bool.arg1, i32 %bool.arg2
26922692
; GFX1030-NEXT: v_lshrrev_b32_e32 v0, 16, v0
26932693
; GFX1030-NEXT: s_setpc_b64 s[30:31]
26942694
;
2695-
; GFX1100-LABEL: fmul_select_bf16_test11:
2695+
; GFX1100-LABEL: fmul_select_bf16_test11_sel_log2val_neg22_pos25:
26962696
; GFX1100: ; %bb.0:
26972697
; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
26982698
; GFX1100-NEXT: v_dual_mov_b32 v3, 0x3480 :: v_dual_lshlrev_b32 v0, 16, v0

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