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Place fold at the end of visitSTORE
1 parent acbc2c1 commit 4485b09

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3 files changed

+15
-15
lines changed

3 files changed

+15
-15
lines changed

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -22541,9 +22541,6 @@ SDValue DAGCombiner::visitSTORE(SDNode *N) {
2254122541
SDValue Value = ST->getValue();
2254222542
SDValue Ptr = ST->getBasePtr();
2254322543

22544-
if (SDValue MaskedStore = foldToMaskedStore(ST, DAG, SDLoc(N)))
22545-
return MaskedStore;
22546-
2254722544
// If this is a store of a bit convert, store the input value if the
2254822545
// resultant store does not need a higher alignment than the original.
2254922546
if (Value.getOpcode() == ISD::BITCAST && !ST->isTruncatingStore() &&
@@ -22772,6 +22769,9 @@ SDValue DAGCombiner::visitSTORE(SDNode *N) {
2277222769
if (SDValue NewSt = splitMergedValStore(ST))
2277322770
return NewSt;
2277422771

22772+
if (SDValue MaskedStore = foldToMaskedStore(ST, DAG, SDLoc(N)))
22773+
return MaskedStore;
22774+
2277522775
return ReduceLoadOpStoreWidth(N);
2277622776
}
2277722777

llvm/test/CodeGen/AArch64/combine-storetomstore.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1117,11 +1117,11 @@ define void @test_masked_store_unaligned_v8i32(<8 x i32> %data, ptr %ptr, <8 x i
11171117
; SVE-LABEL: test_masked_store_unaligned_v8i32:
11181118
; SVE: // %bb.0:
11191119
; SVE-NEXT: // kill: def $q0 killed $q0 def $z0
1120-
; SVE-NEXT: zip2 v3.8b, v2.8b, v0.8b
1121-
; SVE-NEXT: zip1 v2.8b, v2.8b, v0.8b
1122-
; SVE-NEXT: add x8, x0, #17
1120+
; SVE-NEXT: zip1 v3.8b, v2.8b, v0.8b
1121+
; SVE-NEXT: zip2 v2.8b, v2.8b, v0.8b
1122+
; SVE-NEXT: add x8, x0, #1
11231123
; SVE-NEXT: ptrue p0.s, vl4
1124-
; SVE-NEXT: add x9, x0, #1
1124+
; SVE-NEXT: add x9, x0, #17
11251125
; SVE-NEXT: // kill: def $q1 killed $q1 def $z1
11261126
; SVE-NEXT: ushll v3.4s, v3.4h, #0
11271127
; SVE-NEXT: ushll v2.4s, v2.4h, #0
@@ -1131,8 +1131,8 @@ define void @test_masked_store_unaligned_v8i32(<8 x i32> %data, ptr %ptr, <8 x i
11311131
; SVE-NEXT: cmlt v2.4s, v2.4s, #0
11321132
; SVE-NEXT: cmpne p1.s, p0/z, z3.s, #0
11331133
; SVE-NEXT: cmpne p0.s, p0/z, z2.s, #0
1134-
; SVE-NEXT: st1w { z1.s }, p1, [x8]
1135-
; SVE-NEXT: st1w { z0.s }, p0, [x9]
1134+
; SVE-NEXT: st1w { z0.s }, p1, [x8]
1135+
; SVE-NEXT: st1w { z1.s }, p0, [x9]
11361136
; SVE-NEXT: ret
11371137
%ptr_i8 = getelementptr i8, ptr %ptr, i32 1
11381138
%ptr_vec = bitcast ptr %ptr_i8 to ptr

llvm/test/CodeGen/X86/combine-storetomstore.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -392,8 +392,8 @@ define void @test_masked_store_success_v8i64(<8 x i64> %x, ptr %ptr, <8 x i1> %m
392392
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[2,3,2,3]
393393
; AVX-NEXT: vpmovsxdq %xmm2, %xmm2
394394
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm4, %ymm2
395-
; AVX-NEXT: vmaskmovpd %ymm1, %ymm3, 32(%rdi)
396395
; AVX-NEXT: vmaskmovpd %ymm0, %ymm2, (%rdi)
396+
; AVX-NEXT: vmaskmovpd %ymm1, %ymm3, 32(%rdi)
397397
; AVX-NEXT: vzeroupper
398398
; AVX-NEXT: retq
399399
;
@@ -405,8 +405,8 @@ define void @test_masked_store_success_v8i64(<8 x i64> %x, ptr %ptr, <8 x i1> %m
405405
; AVX2-NEXT: vpmovzxwd {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero
406406
; AVX2-NEXT: vpslld $31, %xmm2, %xmm2
407407
; AVX2-NEXT: vpmovsxdq %xmm2, %ymm2
408-
; AVX2-NEXT: vpmaskmovq %ymm1, %ymm3, 32(%rdi)
409408
; AVX2-NEXT: vpmaskmovq %ymm0, %ymm2, (%rdi)
409+
; AVX2-NEXT: vpmaskmovq %ymm1, %ymm3, 32(%rdi)
410410
; AVX2-NEXT: vzeroupper
411411
; AVX2-NEXT: retq
412412
;
@@ -502,8 +502,8 @@ define void @test_masked_store_success_v8f64(<8 x double> %x, ptr %ptr, <8 x i1>
502502
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[2,3,2,3]
503503
; AVX-NEXT: vpmovsxdq %xmm2, %xmm2
504504
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm4, %ymm2
505-
; AVX-NEXT: vmaskmovpd %ymm1, %ymm3, 32(%rdi)
506505
; AVX-NEXT: vmaskmovpd %ymm0, %ymm2, (%rdi)
506+
; AVX-NEXT: vmaskmovpd %ymm1, %ymm3, 32(%rdi)
507507
; AVX-NEXT: vzeroupper
508508
; AVX-NEXT: retq
509509
;
@@ -515,8 +515,8 @@ define void @test_masked_store_success_v8f64(<8 x double> %x, ptr %ptr, <8 x i1>
515515
; AVX2-NEXT: vpmovzxwd {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero
516516
; AVX2-NEXT: vpslld $31, %xmm2, %xmm2
517517
; AVX2-NEXT: vpmovsxdq %xmm2, %ymm2
518-
; AVX2-NEXT: vmaskmovpd %ymm1, %ymm3, 32(%rdi)
519518
; AVX2-NEXT: vmaskmovpd %ymm0, %ymm2, (%rdi)
519+
; AVX2-NEXT: vmaskmovpd %ymm1, %ymm3, 32(%rdi)
520520
; AVX2-NEXT: vzeroupper
521521
; AVX2-NEXT: retq
522522
;
@@ -1506,8 +1506,8 @@ define void @test_masked_store_unaligned_v8i64(<8 x i64> %data, ptr %ptr, <8 x i
15061506
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[2,3,2,3]
15071507
; AVX-NEXT: vpmovsxdq %xmm2, %xmm2
15081508
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm4, %ymm2
1509-
; AVX-NEXT: vmaskmovpd %ymm1, %ymm3, 33(%rdi)
15101509
; AVX-NEXT: vmaskmovpd %ymm0, %ymm2, 1(%rdi)
1510+
; AVX-NEXT: vmaskmovpd %ymm1, %ymm3, 33(%rdi)
15111511
; AVX-NEXT: vzeroupper
15121512
; AVX-NEXT: retq
15131513
;
@@ -1519,8 +1519,8 @@ define void @test_masked_store_unaligned_v8i64(<8 x i64> %data, ptr %ptr, <8 x i
15191519
; AVX2-NEXT: vpmovzxwd {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero
15201520
; AVX2-NEXT: vpslld $31, %xmm2, %xmm2
15211521
; AVX2-NEXT: vpmovsxdq %xmm2, %ymm2
1522-
; AVX2-NEXT: vpmaskmovq %ymm1, %ymm3, 33(%rdi)
15231522
; AVX2-NEXT: vpmaskmovq %ymm0, %ymm2, 1(%rdi)
1523+
; AVX2-NEXT: vpmaskmovq %ymm1, %ymm3, 33(%rdi)
15241524
; AVX2-NEXT: vzeroupper
15251525
; AVX2-NEXT: retq
15261526
;

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