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Fix failed tests
1 parent 6536678 commit 4493e86

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3 files changed

+103
-21
lines changed

3 files changed

+103
-21
lines changed

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -29239,10 +29239,17 @@ void AArch64TargetLowering::ReplaceNodeResults(
2923929239
bool AArch64TargetLowering::useLoadStackGuardNode(const Module &M) const {
2924029240
if (Subtarget->isTargetAndroid() || Subtarget->isTargetFuchsia())
2924129241
return TargetLowering::useLoadStackGuardNode(M);
29242-
return false;
29242+
return !Subtarget->getTargetTriple().isOSMSVCRT() ||
29243+
Subtarget->isTargetMachO() ||
29244+
getTargetMachine().Options.EnableGlobalISel;
2924329245
}
2924429246

29245-
bool AArch64TargetLowering::useStackGuardXorFP() const { return true; }
29247+
bool AArch64TargetLowering::useStackGuardXorFP() const {
29248+
// Currently only MSVC CRTs XOR the frame pointer into the stack guard value.
29249+
return Subtarget->getTargetTriple().isOSMSVCRT() &&
29250+
!Subtarget->isTargetMachO() &&
29251+
!getTargetMachine().Options.EnableGlobalISel;
29252+
}
2924629253

2924729254
SDValue AArch64TargetLowering::emitStackGuardXorFP(SelectionDAG &DAG,
2924829255
SDValue Val,

llvm/test/CodeGen/AArch64/mingw-refptr.ll

Lines changed: 88 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
22
; RUN: llc < %s -mtriple=aarch64-w64-mingw32 | FileCheck %s --check-prefixes=CHECK,CHECK-SD
3-
; RUN: llc < %s -mtriple=aarch64-w64-mingw32 -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI
3+
; RUN: llc < %s -mtriple=aarch64-w64-mingw32 -global-isel | FileCheck %s --check-prefixes=CHECK-GI
44

55
@var = external local_unnamed_addr global i32, align 4
66
@dsolocalvar = external dso_local local_unnamed_addr global i32, align 4
@@ -15,6 +15,13 @@ define dso_local i32 @getVar() {
1515
; CHECK-NEXT: ldr x8, [x8, :lo12:.refptr.var]
1616
; CHECK-NEXT: ldr w0, [x8]
1717
; CHECK-NEXT: ret
18+
;
19+
; CHECK-GI-LABEL: getVar:
20+
; CHECK-GI: // %bb.0: // %entry
21+
; CHECK-GI-NEXT: adrp x8, .refptr.var
22+
; CHECK-GI-NEXT: ldr x8, [x8, :lo12:.refptr.var]
23+
; CHECK-GI-NEXT: ldr w0, [x8]
24+
; CHECK-GI-NEXT: ret
1825
entry:
1926
%0 = load i32, ptr @var, align 4
2027
ret i32 %0
@@ -26,6 +33,12 @@ define dso_local i32 @getDsoLocalVar() {
2633
; CHECK-NEXT: adrp x8, dsolocalvar
2734
; CHECK-NEXT: ldr w0, [x8, :lo12:dsolocalvar]
2835
; CHECK-NEXT: ret
36+
;
37+
; CHECK-GI-LABEL: getDsoLocalVar:
38+
; CHECK-GI: // %bb.0: // %entry
39+
; CHECK-GI-NEXT: adrp x8, dsolocalvar
40+
; CHECK-GI-NEXT: ldr w0, [x8, :lo12:dsolocalvar]
41+
; CHECK-GI-NEXT: ret
2942
entry:
3043
%0 = load i32, ptr @dsolocalvar, align 4
3144
ret i32 %0
@@ -37,6 +50,12 @@ define dso_local i32 @getLocalVar() {
3750
; CHECK-NEXT: adrp x8, localvar
3851
; CHECK-NEXT: ldr w0, [x8, :lo12:localvar]
3952
; CHECK-NEXT: ret
53+
;
54+
; CHECK-GI-LABEL: getLocalVar:
55+
; CHECK-GI: // %bb.0: // %entry
56+
; CHECK-GI-NEXT: adrp x8, localvar
57+
; CHECK-GI-NEXT: ldr w0, [x8, :lo12:localvar]
58+
; CHECK-GI-NEXT: ret
4059
entry:
4160
%0 = load i32, ptr @localvar, align 4
4261
ret i32 %0
@@ -48,6 +67,12 @@ define dso_local i32 @getLocalCommon() {
4867
; CHECK-NEXT: adrp x8, localcommon
4968
; CHECK-NEXT: ldr w0, [x8, :lo12:localcommon]
5069
; CHECK-NEXT: ret
70+
;
71+
; CHECK-GI-LABEL: getLocalCommon:
72+
; CHECK-GI: // %bb.0: // %entry
73+
; CHECK-GI-NEXT: adrp x8, localcommon
74+
; CHECK-GI-NEXT: ldr w0, [x8, :lo12:localcommon]
75+
; CHECK-GI-NEXT: ret
5176
entry:
5277
%0 = load i32, ptr @localcommon, align 4
5378
ret i32 %0
@@ -60,6 +85,13 @@ define dso_local i32 @getExtVar() {
6085
; CHECK-NEXT: ldr x8, [x8, :lo12:__imp_extvar]
6186
; CHECK-NEXT: ldr w0, [x8]
6287
; CHECK-NEXT: ret
88+
;
89+
; CHECK-GI-LABEL: getExtVar:
90+
; CHECK-GI: // %bb.0: // %entry
91+
; CHECK-GI-NEXT: adrp x8, __imp_extvar
92+
; CHECK-GI-NEXT: ldr x8, [x8, :lo12:__imp_extvar]
93+
; CHECK-GI-NEXT: ldr w0, [x8]
94+
; CHECK-GI-NEXT: ret
6395
entry:
6496
%0 = load i32, ptr @extvar, align 4
6597
ret i32 %0
@@ -69,6 +101,10 @@ define dso_local void @callFunc() {
69101
; CHECK-LABEL: callFunc:
70102
; CHECK: // %bb.0: // %entry
71103
; CHECK-NEXT: b otherFunc
104+
;
105+
; CHECK-GI-LABEL: callFunc:
106+
; CHECK-GI: // %bb.0: // %entry
107+
; CHECK-GI-NEXT: b otherFunc
72108
entry:
73109
tail call void @otherFunc()
74110
ret void
@@ -82,25 +118,31 @@ define dso_local void @sspFunc() #0 {
82118
; CHECK-NEXT: // %bb.0: // %entry
83119
; CHECK-NEXT: sub sp, sp, #32
84120
; CHECK-NEXT: .seh_stackalloc 32
85-
; CHECK-NEXT: str x30, [sp, #16] // 8-byte Spill
86-
; CHECK-NEXT: .seh_save_reg x30, 16
121+
; CHECK-NEXT: str x19, [sp, #16] // 8-byte Spill
122+
; CHECK-NEXT: .seh_save_reg x19, 16
123+
; CHECK-NEXT: str x30, [sp, #24] // 8-byte Spill
124+
; CHECK-NEXT: .seh_save_reg x30, 24
87125
; CHECK-NEXT: .seh_endprologue
88-
; CHECK-NEXT: adrp x8, .refptr.__stack_chk_guard
126+
; CHECK-NEXT: adrp x19, .refptr.__stack_chk_guard
127+
; CHECK-NEXT: mov x9, sp
89128
; CHECK-NEXT: add x0, sp, #7
90-
; CHECK-NEXT: ldr x8, [x8, :lo12:.refptr.__stack_chk_guard]
91-
; CHECK-NEXT: ldr x8, [x8]
129+
; CHECK-NEXT: ldr x19, [x19, :lo12:.refptr.__stack_chk_guard]
130+
; CHECK-NEXT: ldr x8, [x19]
131+
; CHECK-NEXT: eor x8, x8, x9
92132
; CHECK-NEXT: str x8, [sp, #8]
93133
; CHECK-NEXT: bl ptrUser
94-
; CHECK-NEXT: adrp x8, .refptr.__stack_chk_guard
95-
; CHECK-NEXT: ldr x8, [x8, :lo12:.refptr.__stack_chk_guard]
96134
; CHECK-NEXT: ldr x9, [sp, #8]
97-
; CHECK-NEXT: ldr x8, [x8]
98-
; CHECK-NEXT: cmp x8, x9
135+
; CHECK-NEXT: mov x8, sp
136+
; CHECK-NEXT: ldr x10, [x19]
137+
; CHECK-NEXT: eor x8, x9, x8
138+
; CHECK-NEXT: cmp x10, x8
99139
; CHECK-NEXT: b.ne .LBB6_2
100140
; CHECK-NEXT: // %bb.1: // %entry
101141
; CHECK-NEXT: .seh_startepilogue
102-
; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Reload
103-
; CHECK-NEXT: .seh_save_reg x30, 16
142+
; CHECK-NEXT: ldr x30, [sp, #24] // 8-byte Reload
143+
; CHECK-NEXT: .seh_save_reg x30, 24
144+
; CHECK-NEXT: ldr x19, [sp, #16] // 8-byte Reload
145+
; CHECK-NEXT: .seh_save_reg x19, 16
104146
; CHECK-NEXT: add sp, sp, #32
105147
; CHECK-NEXT: .seh_stackalloc 32
106148
; CHECK-NEXT: .seh_endepilogue
@@ -110,6 +152,40 @@ define dso_local void @sspFunc() #0 {
110152
; CHECK-NEXT: brk #0x1
111153
; CHECK-NEXT: .seh_endfunclet
112154
; CHECK-NEXT: .seh_endproc
155+
;
156+
; CHECK-GI-LABEL: sspFunc:
157+
; CHECK-GI: .seh_proc sspFunc
158+
; CHECK-GI-NEXT: // %bb.0: // %entry
159+
; CHECK-GI-NEXT: sub sp, sp, #32
160+
; CHECK-GI-NEXT: .seh_stackalloc 32
161+
; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Spill
162+
; CHECK-GI-NEXT: .seh_save_reg x30, 16
163+
; CHECK-GI-NEXT: .seh_endprologue
164+
; CHECK-GI-NEXT: adrp x8, .refptr.__stack_chk_guard
165+
; CHECK-GI-NEXT: add x0, sp, #7
166+
; CHECK-GI-NEXT: ldr x8, [x8, :lo12:.refptr.__stack_chk_guard]
167+
; CHECK-GI-NEXT: ldr x8, [x8]
168+
; CHECK-GI-NEXT: str x8, [sp, #8]
169+
; CHECK-GI-NEXT: bl ptrUser
170+
; CHECK-GI-NEXT: adrp x8, .refptr.__stack_chk_guard
171+
; CHECK-GI-NEXT: ldr x8, [x8, :lo12:.refptr.__stack_chk_guard]
172+
; CHECK-GI-NEXT: ldr x9, [sp, #8]
173+
; CHECK-GI-NEXT: ldr x8, [x8]
174+
; CHECK-GI-NEXT: cmp x8, x9
175+
; CHECK-GI-NEXT: b.ne .LBB6_2
176+
; CHECK-GI-NEXT: // %bb.1: // %entry
177+
; CHECK-GI-NEXT: .seh_startepilogue
178+
; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Reload
179+
; CHECK-GI-NEXT: .seh_save_reg x30, 16
180+
; CHECK-GI-NEXT: add sp, sp, #32
181+
; CHECK-GI-NEXT: .seh_stackalloc 32
182+
; CHECK-GI-NEXT: .seh_endepilogue
183+
; CHECK-GI-NEXT: ret
184+
; CHECK-GI-NEXT: .LBB6_2: // %entry
185+
; CHECK-GI-NEXT: bl __stack_chk_fail
186+
; CHECK-GI-NEXT: brk #0x1
187+
; CHECK-GI-NEXT: .seh_endfunclet
188+
; CHECK-GI-NEXT: .seh_endproc
113189
entry:
114190
%c = alloca i8, align 1
115191
call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %c)
@@ -134,5 +210,4 @@ attributes #0 = { sspstrong }
134210
; CHECK: .xword var
135211

136212
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
137-
; CHECK-GI: {{.*}}
138213
; CHECK-SD: {{.*}}

llvm/test/CodeGen/AArch64/stack-protector-target.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -29,16 +29,16 @@ declare void @_Z7CapturePi(ptr)
2929
; FUCHSIA-AARCH64-COMMON: ldr [[D:.*]], [sp,
3030
; FUCHSIA-AARCH64-COMMON: cmp [[C]], [[D]]
3131

32-
; WINDOWS-AARCH64: adrp x8, __security_cookie
33-
; WINDOWS-AARCH64: ldr x8, [x8, :lo12:__security_cookie]
32+
; WINDOWS-AARCH64: adrp x19, __security_cookie
33+
; WINDOWS-AARCH64: ldr x8, [x19, :lo12:__security_cookie]
3434
; WINDOWS-AARCH64: str x8, [sp, #8]
3535
; WINDOWS-AARCH64: bl _Z7CapturePi
36-
; WINDOWS-AARCH64: ldr x0, [sp, #8]
36+
; WINDOWS-AARCH64: ldr x8, [sp, #8]
3737
; WINDOWS-AARCH64: bl __security_check_cookie
3838

39-
; WINDOWS-ARM64EC: adrp x8, __security_cookie
40-
; WINDOWS-ARM64EC: ldr x8, [x8, :lo12:__security_cookie]
39+
; WINDOWS-ARM64EC: adrp x19, __security_cookie
40+
; WINDOWS-ARM64EC: ldr x8, [x19, :lo12:__security_cookie]
4141
; WINDOWS-ARM64EC: str x8, [sp, #8]
4242
; WINDOWS-ARM64EC: bl "#_Z7CapturePi"
43-
; WINDOWS-ARM64EC: ldr x0, [sp, #8]
43+
; WINDOWS-ARM64EC: ldr x8, [sp, #8]
4444
; WINDOWS-ARM64EC: bl "#__security_check_cookie_arm64ec"

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