@@ -148,30 +148,30 @@ define amdgpu_ps void @init_exec(i64 %var) {
148148 ret void
149149}
150150
151- declare i32 @llvm.amdgcn.s.sendmsg (i32 , i32 )
151+ declare void @llvm.amdgcn.s.sendmsg (i32 , i32 )
152152define void @sendmsg (i32 %arg0 , i32 %arg1 ) {
153153 ; CHECK: immarg operand has non-immediate parameter
154154 ; CHECK-NEXT: i32 %arg0
155- ; CHECK-NEXT: %val = call i32 @llvm.amdgcn.s.sendmsg(i32 %arg0, i32 %arg1)
156- %val = call i32 @llvm.amdgcn.s.sendmsg (i32 %arg0 , i32 %arg1 )
155+ ; CHECK-NEXT: call void @llvm.amdgcn.s.sendmsg(i32 %arg0, i32 %arg1)
156+ call void @llvm.amdgcn.s.sendmsg (i32 %arg0 , i32 %arg1 )
157157 ret void
158158}
159159
160- declare i32 @llvm.amdgcn.s.sendmsghalt (i32 , i32 )
160+ declare void @llvm.amdgcn.s.sendmsghalt (i32 , i32 )
161161define void @sendmsghalt (i32 %arg0 , i32 %arg1 ) {
162162 ; CHECK: immarg operand has non-immediate parameter
163163 ; CHECK-NEXT: i32 %arg0
164- ; CHECK-NEXT: %val = call i32 @llvm.amdgcn.s.sendmsghalt(i32 %arg0, i32 %arg1)
165- %val = call i32 @llvm.amdgcn.s.sendmsghalt (i32 %arg0 , i32 %arg1 )
164+ ; CHECK-NEXT: call void @llvm.amdgcn.s.sendmsghalt(i32 %arg0, i32 %arg1)
165+ call void @llvm.amdgcn.s.sendmsghalt (i32 %arg0 , i32 %arg1 )
166166 ret void
167167}
168168
169- declare i32 @llvm.amdgcn.s.waitcnt (i32 )
169+ declare void @llvm.amdgcn.s.waitcnt (i32 )
170170define void @waitcnt (i32 %arg0 ) {
171171 ; CHECK: immarg operand has non-immediate parameter
172172 ; CHECK-NEXT: i32 %arg0
173- ; CHECK-NEXT: %val = call i32 @llvm.amdgcn.s.waitcnt(i32 %arg0)
174- %val = call i32 @llvm.amdgcn.s.waitcnt (i32 %arg0 )
173+ ; CHECK-NEXT: call void @llvm.amdgcn.s.waitcnt(i32 %arg0)
174+ call void @llvm.amdgcn.s.waitcnt (i32 %arg0 )
175175 ret void
176176}
177177
@@ -184,30 +184,30 @@ define void @getreg(i32 %arg0, i32 %arg1) {
184184 ret void
185185}
186186
187- declare i32 @llvm.amdgcn.s.sleep (i32 )
187+ declare void @llvm.amdgcn.s.sleep (i32 )
188188define void @sleep (i32 %arg0 , i32 %arg1 ) {
189189 ; CHECK: immarg operand has non-immediate parameter
190190 ; CHECK-NEXT: i32 %arg0
191- ; CHECK-NEXT: %val = call i32 @llvm.amdgcn.s.sleep(i32 %arg0)
192- %val = call i32 @llvm.amdgcn.s.sleep (i32 %arg0 )
191+ ; CHECK-NEXT: call void @llvm.amdgcn.s.sleep(i32 %arg0)
192+ call void @llvm.amdgcn.s.sleep (i32 %arg0 )
193193 ret void
194194}
195195
196- declare i32 @llvm.amdgcn.s.incperflevel (i32 )
196+ declare void @llvm.amdgcn.s.incperflevel (i32 )
197197define void @incperflevel (i32 %arg0 , i32 %arg1 ) {
198198 ; CHECK: immarg operand has non-immediate parameter
199199 ; CHECK-NEXT: i32 %arg0
200- ; CHECK-NEXT: %val = call i32 @llvm.amdgcn.s.incperflevel(i32 %arg0)
201- %val = call i32 @llvm.amdgcn.s.incperflevel (i32 %arg0 )
200+ ; CHECK-NEXT: call void @llvm.amdgcn.s.incperflevel(i32 %arg0)
201+ call void @llvm.amdgcn.s.incperflevel (i32 %arg0 )
202202 ret void
203203}
204204
205- declare i32 @llvm.amdgcn.s.decperflevel (i32 )
205+ declare void @llvm.amdgcn.s.decperflevel (i32 )
206206define void @decperflevel (i32 %arg0 , i32 %arg1 ) {
207207 ; CHECK: immarg operand has non-immediate parameter
208208 ; CHECK-NEXT: i32 %arg0
209- ; CHECK-NEXT: %val = call i32 @llvm.amdgcn.s.decperflevel(i32 %arg0)
210- %val = call i32 @llvm.amdgcn.s.decperflevel (i32 %arg0 )
209+ ; CHECK-NEXT: call void @llvm.amdgcn.s.decperflevel(i32 %arg0)
210+ call void @llvm.amdgcn.s.decperflevel (i32 %arg0 )
211211 ret void
212212}
213213
@@ -629,25 +629,25 @@ define void @test_interp_p2_f16(float %arg0, float %arg1, i32 %arg2, i32 %arg3,
629629 ret void
630630}
631631
632- declare <32 x i32 > @llvm.amdgcn.mfma.f32.32x32x1f32 (float , float , <32 x i32 >, i32 , i32 , i32 )
633- define void @test_mfma_f32_32x32x1f32 (float %arg0 , float %arg1 , <32 x i32 > %arg2 , i32 %arg3 , i32 %arg4 , i32 %arg5 ) {
632+ declare <32 x float > @llvm.amdgcn.mfma.f32.32x32x1f32 (float , float , <32 x float >, i32 , i32 , i32 )
633+ define void @test_mfma_f32_32x32x1f32 (float %arg0 , float %arg1 , <32 x float > %arg2 , i32 %arg3 , i32 %arg4 , i32 %arg5 ) {
634634 ; CHECK: immarg operand has non-immediate parameter
635635 ; CHECK-NEXT: i32 %arg3
636- ; CHECK-NEXT: %val0 = call <32 x i32 > @llvm.amdgcn.mfma.f32.32x32x1f32(float %arg0, float %arg1, <32 x i32 > %arg2, i32 %arg3, i32 2, i32 3)
637- %val0 = call <32 x i32 > @llvm.amdgcn.mfma.f32.32x32x1f32 (float %arg0 , float %arg1 , <32 x i32 > %arg2 , i32 %arg3 , i32 2 , i32 3 )
638- store volatile <32 x i32 > %val0 , ptr addrspace (1 ) undef
636+ ; CHECK-NEXT: %val0 = call <32 x float > @llvm.amdgcn.mfma.f32.32x32x1f32(float %arg0, float %arg1, <32 x float > %arg2, i32 %arg3, i32 2, i32 3)
637+ %val0 = call <32 x float > @llvm.amdgcn.mfma.f32.32x32x1f32 (float %arg0 , float %arg1 , <32 x float > %arg2 , i32 %arg3 , i32 2 , i32 3 )
638+ store volatile <32 x float > %val0 , ptr addrspace (1 ) undef
639639
640640 ; CHECK: immarg operand has non-immediate parameter
641641 ; CHECK-NEXT: i32 %arg4
642- ; CHECK-NEXT: %val1 = call <32 x i32 > @llvm.amdgcn.mfma.f32.32x32x1f32(float %arg0, float %arg1, <32 x i32 > %arg2, i32 1, i32 %arg4, i32 3)
643- %val1 = call <32 x i32 > @llvm.amdgcn.mfma.f32.32x32x1f32 (float %arg0 , float %arg1 , <32 x i32 > %arg2 , i32 1 , i32 %arg4 , i32 3 )
644- store volatile <32 x i32 > %val1 , ptr addrspace (1 ) undef
642+ ; CHECK-NEXT: %val1 = call <32 x float > @llvm.amdgcn.mfma.f32.32x32x1f32(float %arg0, float %arg1, <32 x float > %arg2, i32 1, i32 %arg4, i32 3)
643+ %val1 = call <32 x float > @llvm.amdgcn.mfma.f32.32x32x1f32 (float %arg0 , float %arg1 , <32 x float > %arg2 , i32 1 , i32 %arg4 , i32 3 )
644+ store volatile <32 x float > %val1 , ptr addrspace (1 ) undef
645645
646646 ; CHECK: immarg operand has non-immediate parameter
647647 ; CHECK-NEXT: i32 %arg5
648- ; CHECK-NEXT: %val2 = call <32 x i32 > @llvm.amdgcn.mfma.f32.32x32x1f32(float %arg0, float %arg1, <32 x i32 > %arg2, i32 1, i32 2, i32 %arg5)
649- %val2 = call <32 x i32 > @llvm.amdgcn.mfma.f32.32x32x1f32 (float %arg0 , float %arg1 , <32 x i32 > %arg2 , i32 1 , i32 2 , i32 %arg5 )
650- store volatile <32 x i32 > %val2 , ptr addrspace (1 ) undef
648+ ; CHECK-NEXT: %val2 = call <32 x float > @llvm.amdgcn.mfma.f32.32x32x1f32(float %arg0, float %arg1, <32 x float > %arg2, i32 1, i32 2, i32 %arg5)
649+ %val2 = call <32 x float > @llvm.amdgcn.mfma.f32.32x32x1f32 (float %arg0 , float %arg1 , <32 x float > %arg2 , i32 1 , i32 2 , i32 %arg5 )
650+ store volatile <32 x float > %val2 , ptr addrspace (1 ) undef
651651
652652 ret void
653653}
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