We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent 1c2779f commit 451a66cCopy full SHA for 451a66c
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -1334,7 +1334,7 @@ SIInstrInfo::pierceThroughRegSequence(const MachineInstr &MI) const {
1334
MRI.getRegClass(RealDefs[(I + 1) % 2]->getOperand(0).getReg())
1335
->MC->getSizeInBits() *
1336
2 ==
1337
- MRI.getRegClass(MI.getOperand(0).getReg())->MC->getSizeInBits())
+ MRI.getRegClass(MI.getOperand(0).getReg())->MC->getSizeInBits())
1338
return RealDefs[(I + 1) % 2];
1339
1340
return nullptr;
0 commit comments