@@ -1743,7 +1743,7 @@ bool SPIRVInstructionSelector::selectDot4AddPackedExpansion(
17431743 assert (I.getOperand (4 ).isReg ());
17441744 MachineBasicBlock &BB = *I.getParent ();
17451745
1746- bool Result = true ;
1746+ bool Result = false ;
17471747
17481748 // Acc = C
17491749 Register Acc = I.getOperand (4 ).getReg ();
@@ -1755,7 +1755,7 @@ bool SPIRVInstructionSelector::selectDot4AddPackedExpansion(
17551755 for (unsigned i = 0 ; i < 4 ; i++) {
17561756 // A[i]
17571757 Register AElt = MRI->createVirtualRegister (&SPIRV::IDRegClass);
1758- Result & = BuildMI (BB, I, I.getDebugLoc (), TII.get (ExtractOp))
1758+ Result | = BuildMI (BB, I, I.getDebugLoc (), TII.get (ExtractOp))
17591759 .addDef (AElt)
17601760 .addUse (GR.getSPIRVTypeID (ResType))
17611761 .addUse (I.getOperand (2 ).getReg ())
@@ -1765,7 +1765,7 @@ bool SPIRVInstructionSelector::selectDot4AddPackedExpansion(
17651765
17661766 // B[i]
17671767 Register BElt = MRI->createVirtualRegister (&SPIRV::IDRegClass);
1768- Result & = BuildMI (BB, I, I.getDebugLoc (), TII.get (ExtractOp))
1768+ Result | = BuildMI (BB, I, I.getDebugLoc (), TII.get (ExtractOp))
17691769 .addDef (BElt)
17701770 .addUse (GR.getSPIRVTypeID (ResType))
17711771 .addUse (I.getOperand (3 ).getReg ())
@@ -1775,7 +1775,7 @@ bool SPIRVInstructionSelector::selectDot4AddPackedExpansion(
17751775
17761776 // A[i] * B[i]
17771777 Register Mul = MRI->createVirtualRegister (&SPIRV::IDRegClass);
1778- Result & = BuildMI (BB, I, I.getDebugLoc (), TII.get (SPIRV::OpIMulS))
1778+ Result | = BuildMI (BB, I, I.getDebugLoc (), TII.get (SPIRV::OpIMulS))
17791779 .addDef (Mul)
17801780 .addUse (GR.getSPIRVTypeID (ResType))
17811781 .addUse (AElt)
@@ -1784,7 +1784,7 @@ bool SPIRVInstructionSelector::selectDot4AddPackedExpansion(
17841784
17851785 // Discard 24 highest-bits so that stored i32 register is i8 equivalent
17861786 Register MaskMul = MRI->createVirtualRegister (&SPIRV::IDRegClass);
1787- Result & = BuildMI (BB, I, I.getDebugLoc (), TII.get (ExtractOp))
1787+ Result | = BuildMI (BB, I, I.getDebugLoc (), TII.get (ExtractOp))
17881788 .addDef (MaskMul)
17891789 .addUse (GR.getSPIRVTypeID (ResType))
17901790 .addUse (Mul)
@@ -1795,7 +1795,7 @@ bool SPIRVInstructionSelector::selectDot4AddPackedExpansion(
17951795 // Acc = Acc + A[i] * B[i]
17961796 Register Sum =
17971797 i < 3 ? MRI->createVirtualRegister (&SPIRV::IDRegClass) : ResVReg;
1798- Result & = BuildMI (BB, I, I.getDebugLoc (), TII.get (SPIRV::OpIAddS))
1798+ Result | = BuildMI (BB, I, I.getDebugLoc (), TII.get (SPIRV::OpIAddS))
17991799 .addDef (Sum)
18001800 .addUse (GR.getSPIRVTypeID (ResType))
18011801 .addUse (Acc)
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