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mshockwavemshockwave
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fixup! Address review comments
1 parent 958b507 commit 46c53aa

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6 files changed

+34
-41
lines changed

6 files changed

+34
-41
lines changed

‎llvm/include/llvm/CodeGen/TargetLowering.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3160,7 +3160,7 @@ class TargetLoweringBase {
31603160
/// \p LI is the accompanying load instruction.
31613161
/// \p DeinterleaveValues contains the deinterleaved values.
31623162
virtual bool
3163-
lowerDeinterleaveIntrinsicToLoad(IntrinsicInst *DI, LoadInst *LI,
3163+
lowerDeinterleaveIntrinsicToLoad(LoadInst *LI,
31643164
ArrayRef<Value *> DeinterleaveValues) const {
31653165
return false;
31663166
}
@@ -3173,7 +3173,7 @@ class TargetLoweringBase {
31733173
/// \p SI is the accompanying store instruction
31743174
/// \p InterleaveValues contains the interleaved values.
31753175
virtual bool
3176-
lowerInterleaveIntrinsicToStore(IntrinsicInst *II, StoreInst *SI,
3176+
lowerInterleaveIntrinsicToStore(StoreInst *SI,
31773177
ArrayRef<Value *> InterleaveValues) const {
31783178
return false;
31793179
}

‎llvm/lib/CodeGen/InterleavedAccessPass.cpp‎

Lines changed: 11 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -493,35 +493,30 @@ bool InterleavedAccessImpl::lowerInterleavedStore(
493493
// hooks (e.g. lowerDeinterleaveIntrinsicToLoad) expect ABCD, so we need
494494
// to reorder them by interleaving these values.
495495
static void interleaveLeafValues(MutableArrayRef<Value *> SubLeaves) {
496-
int NumLeaves = SubLeaves.size();
496+
unsigned NumLeaves = SubLeaves.size();
497497
if (NumLeaves == 2)
498498
return;
499499

500500
assert(isPowerOf2_32(NumLeaves) && NumLeaves > 1);
501501

502-
const int HalfLeaves = NumLeaves / 2;
502+
const unsigned HalfLeaves = NumLeaves / 2;
503503
// Visit the sub-trees.
504504
interleaveLeafValues(SubLeaves.take_front(HalfLeaves));
505505
interleaveLeafValues(SubLeaves.drop_front(HalfLeaves));
506506

507507
SmallVector<Value *, 8> Buffer;
508-
// The step is alternating between +half and -half+1. We exit the
509-
// loop right before the last element because given the fact that
510-
// SubLeaves always has an even number of elements, the last element
511-
// will never be moved and the last to be visited. This simplifies
512-
// the exit condition.
513-
for (int i = 0; i < NumLeaves - 1;
514-
(i < HalfLeaves) ? i += HalfLeaves : i += (1 - HalfLeaves))
515-
Buffer.push_back(SubLeaves[i]);
508+
// a0 a1 a2 a3 b0 b1 b2 b3
509+
// -> a0 b0 a1 b1 a2 b2 a3 b3
510+
for (unsigned i = 0U; i < NumLeaves; ++i)
511+
Buffer.push_back(SubLeaves[i / 2 + (i % 2 ? HalfLeaves : 0)]);
516512

517513
llvm::copy(Buffer, SubLeaves.begin());
518514
}
519515

520516
static bool
521517
getVectorInterleaveFactor(IntrinsicInst *II, SmallVectorImpl<Value *> &Operands,
522518
SmallVectorImpl<Instruction *> &DeadInsts) {
523-
if (II->getIntrinsicID() != Intrinsic::vector_interleave2)
524-
return false;
519+
assert(II->getIntrinsicID() == Intrinsic::vector_interleave2);
525520

526521
// Visit with BFS
527522
SmallVector<IntrinsicInst *, 8> Queue;
@@ -564,9 +559,9 @@ static bool
564559
getVectorDeinterleaveFactor(IntrinsicInst *II,
565560
SmallVectorImpl<Value *> &Results,
566561
SmallVectorImpl<Instruction *> &DeadInsts) {
562+
assert(II->getIntrinsicID() == Intrinsic::vector_deinterleave2);
567563
using namespace PatternMatch;
568-
if (II->getIntrinsicID() != Intrinsic::vector_deinterleave2 ||
569-
!II->hasNUses(2))
564+
if (!II->hasNUses(2))
570565
return false;
571566

572567
// Visit with BFS
@@ -652,7 +647,7 @@ bool InterleavedAccessImpl::lowerDeinterleaveIntrinsic(
652647
<< " with factor = " << DeinterleaveValues.size() << "\n");
653648

654649
// Try and match this with target specific intrinsics.
655-
if (!TLI->lowerDeinterleaveIntrinsicToLoad(DI, LI, DeinterleaveValues))
650+
if (!TLI->lowerDeinterleaveIntrinsicToLoad(LI, DeinterleaveValues))
656651
return false;
657652

658653
DeadInsts.insert(DeinterleaveDeadInsts.begin(), DeinterleaveDeadInsts.end());
@@ -680,7 +675,7 @@ bool InterleavedAccessImpl::lowerInterleaveIntrinsic(
680675
<< " with factor = " << InterleaveValues.size() << "\n");
681676

682677
// Try and match this with target specific intrinsics.
683-
if (!TLI->lowerInterleaveIntrinsicToStore(II, SI, InterleaveValues))
678+
if (!TLI->lowerInterleaveIntrinsicToStore(SI, InterleaveValues))
684679
return false;
685680

686681
// We now have a target-specific store, so delete the old one.

‎llvm/lib/Target/AArch64/AArch64ISelLowering.cpp‎

Lines changed: 15 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -17465,14 +17465,16 @@ bool AArch64TargetLowering::lowerInterleavedStore(StoreInst *SI,
1746517465
}
1746617466

1746717467
bool AArch64TargetLowering::lowerDeinterleaveIntrinsicToLoad(
17468-
IntrinsicInst *DI, LoadInst *LI,
17469-
ArrayRef<Value *> DeinterleavedValues) const {
17468+
LoadInst *LI, ArrayRef<Value *> DeinterleavedValues) const {
1747017469
unsigned Factor = DeinterleavedValues.size();
17471-
assert((Factor == 2 || Factor == 4) &&
17472-
"Currently supported Factor is 2 or 4 only");
17470+
if (Factor != 2 && Factor != 4) {
17471+
LLVM_DEBUG(dbgs() << "Matching ld2 and ld4 patterns failed\n");
17472+
return false;
17473+
}
17474+
1747317475
VectorType *VTy = cast<VectorType>(DeinterleavedValues[0]->getType());
1747417476

17475-
const DataLayout &DL = DI->getModule()->getDataLayout();
17477+
const DataLayout &DL = LI->getModule()->getDataLayout();
1747617478
bool UseScalable;
1747717479
if (!isLegalInterleavedAccessType(VTy, DL, UseScalable))
1747817480
return false;
@@ -17488,7 +17490,7 @@ bool AArch64TargetLowering::lowerDeinterleaveIntrinsicToLoad(
1748817490
VTy->getElementCount().divideCoefficientBy(NumLoads));
1748917491

1749017492
Type *PtrTy = LI->getPointerOperandType();
17491-
Function *LdNFunc = getStructuredLoadFunction(DI->getModule(), Factor,
17493+
Function *LdNFunc = getStructuredLoadFunction(LI->getModule(), Factor,
1749217494
UseScalable, LdTy, PtrTy);
1749317495

1749417496
IRBuilder<> Builder(LI);
@@ -17537,13 +17539,15 @@ bool AArch64TargetLowering::lowerDeinterleaveIntrinsicToLoad(
1753717539
}
1753817540

1753917541
bool AArch64TargetLowering::lowerInterleaveIntrinsicToStore(
17540-
IntrinsicInst *II, StoreInst *SI,
17541-
ArrayRef<Value *> InterleavedValues) const {
17542+
StoreInst *SI, ArrayRef<Value *> InterleavedValues) const {
1754217543
unsigned Factor = InterleavedValues.size();
17543-
assert((Factor == 2 || Factor == 4) &&
17544-
"Currently supported Factor is 2 or 4 only");
17544+
if (Factor != 2 && Factor != 4) {
17545+
LLVM_DEBUG(dbgs() << "Matching st2 and st4 patterns failed\n");
17546+
return false;
17547+
}
17548+
1754517549
VectorType *VTy = cast<VectorType>(InterleavedValues[0]->getType());
17546-
const DataLayout &DL = II->getModule()->getDataLayout();
17550+
const DataLayout &DL = SI->getModule()->getDataLayout();
1754717551

1754817552
bool UseScalable;
1754917553
if (!isLegalInterleavedAccessType(VTy, DL, UseScalable))

‎llvm/lib/Target/AArch64/AArch64ISelLowering.h‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -714,12 +714,10 @@ class AArch64TargetLowering : public TargetLowering {
714714
unsigned Factor) const override;
715715

716716
bool lowerDeinterleaveIntrinsicToLoad(
717-
IntrinsicInst *DI, LoadInst *LI,
718-
ArrayRef<Value *> DeinterleaveValues) const override;
717+
LoadInst *LI, ArrayRef<Value *> DeinterleaveValues) const override;
719718

720719
bool lowerInterleaveIntrinsicToStore(
721-
IntrinsicInst *II, StoreInst *SI,
722-
ArrayRef<Value *> InterleaveValues) const override;
720+
StoreInst *SI, ArrayRef<Value *> InterleaveValues) const override;
723721

724722
bool isLegalAddImmediate(int64_t) const override;
725723
bool isLegalAddScalableImmediate(int64_t) const override;

‎llvm/lib/Target/RISCV/RISCVISelLowering.cpp‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -22386,8 +22386,7 @@ bool RISCVTargetLowering::lowerInterleavedStore(StoreInst *SI,
2238622386
}
2238722387

2238822388
bool RISCVTargetLowering::lowerDeinterleaveIntrinsicToLoad(
22389-
IntrinsicInst *DI, LoadInst *LI,
22390-
ArrayRef<Value *> DeinterleaveValues) const {
22389+
LoadInst *LI, ArrayRef<Value *> DeinterleaveValues) const {
2239122390
unsigned Factor = DeinterleaveValues.size();
2239222391
if (Factor > 8)
2239322392
return false;
@@ -22456,8 +22455,7 @@ bool RISCVTargetLowering::lowerDeinterleaveIntrinsicToLoad(
2245622455
}
2245722456

2245822457
bool RISCVTargetLowering::lowerInterleaveIntrinsicToStore(
22459-
IntrinsicInst *II, StoreInst *SI,
22460-
ArrayRef<Value *> InterleaveValues) const {
22458+
StoreInst *SI, ArrayRef<Value *> InterleaveValues) const {
2246122459
unsigned Factor = InterleaveValues.size();
2246222460
if (Factor > 8)
2246322461
return false;

‎llvm/lib/Target/RISCV/RISCVISelLowering.h‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -905,12 +905,10 @@ class RISCVTargetLowering : public TargetLowering {
905905
unsigned Factor) const override;
906906

907907
bool lowerDeinterleaveIntrinsicToLoad(
908-
IntrinsicInst *II, LoadInst *LI,
909-
ArrayRef<Value *> DeinterleaveValues) const override;
908+
LoadInst *LI, ArrayRef<Value *> DeinterleaveValues) const override;
910909

911910
bool lowerInterleaveIntrinsicToStore(
912-
IntrinsicInst *II, StoreInst *SI,
913-
ArrayRef<Value *> InterleaveValues) const override;
911+
StoreInst *SI, ArrayRef<Value *> InterleaveValues) const override;
914912

915913
bool supportKCFIBundles() const override { return true; }
916914

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