@@ -845,7 +845,7 @@ SDValue XtensaTargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
845845 SDValue SizeTmp =
846846 DAG.getNode (ISD::ADD, DL, VT, Size, DAG.getConstant (31 , DL, MVT::i32 ));
847847 SDValue SizeRoundUp = DAG.getNode (ISD::AND, DL, VT, SizeTmp,
848- DAG.getConstant (~31 , DL, MVT::i32 ));
848+ DAG.getSignedConstant (~31 , DL, MVT::i32 ));
849849
850850 unsigned SPReg = Xtensa::SP;
851851 SDValue SP = DAG.getCopyFromReg (Chain, DL, SPReg, VT);
@@ -873,7 +873,7 @@ SDValue XtensaTargetLowering::LowerShiftLeftParts(SDValue Op,
873873 // Lo = 0
874874 // Hi = Lo << (Shamt - register size)
875875
876- SDValue MinusRegisterSize = DAG.getConstant (-32 , DL, VT);
876+ SDValue MinusRegisterSize = DAG.getSignedConstant (-32 , DL, VT);
877877 SDValue ShamtMinusRegisterSize =
878878 DAG.getNode (ISD::ADD, DL, VT, Shamt, MinusRegisterSize);
879879
@@ -914,7 +914,7 @@ SDValue XtensaTargetLowering::LowerShiftRightParts(SDValue Op,
914914 // Hi = 0;
915915
916916 unsigned ShiftRightOp = IsSRA ? ISD::SRA : ISD::SRL;
917- SDValue MinusRegisterSize = DAG.getConstant (-32 , DL, VT);
917+ SDValue MinusRegisterSize = DAG.getSignedConstant (-32 , DL, VT);
918918 SDValue RegisterSizeMinus1 = DAG.getConstant (32 - 1 , DL, VT);
919919 SDValue ShamtMinusRegisterSize =
920920 DAG.getNode (ISD::ADD, DL, VT, Shamt, MinusRegisterSize);
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