@@ -1785,22 +1785,22 @@ let Predicates = [HasV9], Uses = [ASR3], Constraints = "$swap = $rd" in
17851785// as inline assembler-supported instructions.
17861786let Predicates = [HasUMAC_SMAC], Defs = [Y, ASR18], Uses = [Y, ASR18] in {
17871787 def SMACrr : F3_1<2, 0b111111,
1788- (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2, ASRRegs:$asr18 ),
1788+ (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2),
17891789 "smac $rs1, $rs2, $rd",
17901790 [], IIC_smac_umac>;
17911791
17921792 def SMACri : F3_2<2, 0b111111,
1793- (outs IntRegs:$rd), (ins IntRegs:$rs1, simm13Op:$simm13, ASRRegs:$asr18 ),
1793+ (outs IntRegs:$rd), (ins IntRegs:$rs1, simm13Op:$simm13),
17941794 "smac $rs1, $simm13, $rd",
17951795 [], IIC_smac_umac>;
17961796
17971797 def UMACrr : F3_1<2, 0b111110,
1798- (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2, ASRRegs:$asr18 ),
1798+ (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2),
17991799 "umac $rs1, $rs2, $rd",
18001800 [], IIC_smac_umac>;
18011801
18021802 def UMACri : F3_2<2, 0b111110,
1803- (outs IntRegs:$rd), (ins IntRegs:$rs1, simm13Op:$simm13, ASRRegs:$asr18 ),
1803+ (outs IntRegs:$rd), (ins IntRegs:$rs1, simm13Op:$simm13),
18041804 "umac $rs1, $simm13, $rd",
18051805 [], IIC_smac_umac>;
18061806}
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