@@ -660,17 +660,17 @@ static void printMask(raw_ostream &OS, LaneBitmask Val) {
660660// Try to combine Idx's compose map into Vec if it is compatible.
661661// Return false if it's not possible.
662662static bool combine (const CodeGenSubRegIndex *Idx,
663- SmallVectorImpl<CodeGenSubRegIndex *> &Vec) {
663+ SmallVectorImpl<const CodeGenSubRegIndex *> &Vec) {
664664 const CodeGenSubRegIndex::CompMap &Map = Idx->getComposites ();
665665 for (const auto &I : Map) {
666- CodeGenSubRegIndex *&Entry = Vec[I.first ->EnumValue - 1 ];
666+ const CodeGenSubRegIndex *&Entry = Vec[I.first ->EnumValue - 1 ];
667667 if (Entry && Entry != I.second )
668668 return false ;
669669 }
670670
671671 // All entries are compatible. Make it so.
672672 for (const auto &I : Map) {
673- auto *&Entry = Vec[I.first ->EnumValue - 1 ];
673+ const CodeGenSubRegIndex *&Entry = Vec[I.first ->EnumValue - 1 ];
674674 assert ((!Entry || Entry == I.second ) && " Expected EnumValue to be unique" );
675675 Entry = I.second ;
676676 }
@@ -692,7 +692,7 @@ void RegisterInfoEmitter::emitComposeSubRegIndices(raw_ostream &OS,
692692
693693 // Map each Sub-register index to a compatible table row.
694694 SmallVector<unsigned , 4 > RowMap;
695- SmallVector<SmallVector<CodeGenSubRegIndex *, 4 >, 4 > Rows;
695+ SmallVector<SmallVector<const CodeGenSubRegIndex *, 4 >, 4 > Rows;
696696
697697 auto SubRegIndicesSize =
698698 std::distance (SubRegIndices.begin (), SubRegIndices.end ());
0 commit comments