Formatting

Change-Id: I0740caff1b1453902edd3f1037852c38d37d7117

Author: jrbyrnes

llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp

@@ -29,11 +29,11 @@ enum { MAX_LANES = 64 };
 
 using namespace llvm;
 
-cl::opt<bool>
-    MFMAVGPRForm("amdgpu-mfma-vgpr-form", cl::Hidden,
-             cl::desc("Whether to force use VGPR for Opc and Dest of MFMA. If "
-                      "unspecified, default to compiler heuristics"),
-             cl::init(false));
+cl::opt<bool> MFMAVGPRForm(
+    "amdgpu-mfma-vgpr-form", cl::Hidden,
+    cl::desc("Whether to force use VGPR for Opc and Dest of MFMA. If "
+             "unspecified, default to compiler heuristics"),
+    cl::init(false));
 
 const GCNTargetMachine &getTM(const GCNSubtarget *STI) {
   const SITargetLowering *TLI = STI->getTargetLowering();