fixup! [RISCV] Change vector tuple type's TypeSize to scalable

Author: 4vtomat

llvm/include/llvm/CodeGenTypes/MachineValueType.h

@@ -306,14 +306,13 @@ namespace llvm {
     /// be set and the runtime size will be a positive integer multiple of the
     /// base size.
     TypeSize getSizeInBits() const {
-      // clang-format off
       static constexpr TypeSize SizeTable[] = {
 #define GET_VT_ATTR(Ty, N, Sz, Any, Int, FP, Vec, Sc, Tup, NF, NElem, EltTy) \
-    TypeSize(Sz, Sc || Tup || Ty == aarch64svcount /* FIXME: Not in the td. */),
+    TypeSize(Sz, Sc || Tup || Ty == aarch64svcount /* FIXME: Not in the td.    \
+                                                    */),
 #include "llvm/CodeGen/GenVT.inc"
 #undef GET_VT_ATTR
       };
-      // clang-format on
 
       switch (SimpleTy) {
       case INVALID_SIMPLE_VALUE_TYPE:

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

@@ -21311,6 +21311,7 @@ bool RISCVTargetLowering::splitValueIntoRegisterParts(
   }
 
   if (ValueVT.isRISCVVectorTuple() && PartVT.isRISCVVectorTuple()) {
+#ifndef NDEBUG
     unsigned ValNF = ValueVT.getRISCVVectorTupleNumFields();
     [[maybe_unused]] unsigned ValLMUL =
         divideCeil(ValueVT.getSizeInBits().getKnownMinValue(),
@@ -21322,6 +21323,7 @@ bool RISCVTargetLowering::splitValueIntoRegisterParts(
     assert(ValNF == PartNF && ValLMUL == PartLMUL &&
            "RISC-V vector tuple type only accepts same register class type "
            "TUPLE_INSERT");
+#endif
 
     Val = DAG.getNode(RISCVISD::TUPLE_INSERT, DL, PartVT, DAG.getUNDEF(PartVT),
                       Val, DAG.getVectorIdxConstant(0, DL));