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1 parent 50cc58c commit 496b064Copy full SHA for 496b064
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -515,7 +515,7 @@ SDValue VectorLegalizer::LegalizeOp(SDValue Op) {
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Node->getOperand(0).getValueType());
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// Defer non-vector results to LegalizeDAG.
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if (Action == TargetLowering::Promote)
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- Action = TargetLowering::Legal;
+ Action = TargetLowering::Legal;
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break;
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case ISD::VECREDUCE_SEQ_FADD:
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case ISD::VECREDUCE_SEQ_FMUL:
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