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[DAGCombiner] Enable constant folding of (bitcast int_c0) -> fp_c0
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10 files changed

+74
-52
lines changed

10 files changed

+74
-52
lines changed

‎llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -15228,11 +15228,9 @@ SDValue DAGCombiner::visitBITCAST(SDNode *N) {
1522815228
// scalar type is legal. Only do this before legalize ops, since the target
1522915229
// maybe depending on the bitcast.
1523015230
// First check to see if this is all constant.
15231-
// TODO: Support FP bitcasts after legalize types.
1523215231
if (VT.isVector() &&
1523315232
(!LegalTypes ||
15234-
(!LegalOperations && VT.isInteger() && N0.getValueType().isInteger() &&
15235-
TLI.isTypeLegal(VT.getVectorElementType()))) &&
15233+
(!LegalOperations && TLI.isTypeLegal(VT.getVectorElementType()))) &&
1523615234
N0.getOpcode() == ISD::BUILD_VECTOR && N0->hasOneUse() &&
1523715235
cast<BuildVectorSDNode>(N0)->isConstant())
1523815236
return ConstantFoldBITCASTofBUILD_VECTOR(N0.getNode(),

‎llvm/test/CodeGen/AArch64/aarch64-neon-vector-insert-uaddlv.ll‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -146,9 +146,8 @@ define void @insert_vec_v6i64_uaddlv_from_v4i32(ptr %0) {
146146
; CHECK-LABEL: insert_vec_v6i64_uaddlv_from_v4i32:
147147
; CHECK: ; %bb.0: ; %entry
148148
; CHECK-NEXT: movi.2d v0, #0000000000000000
149-
; CHECK-NEXT: movi.2d v2, #0000000000000000
149+
; CHECK-NEXT: str xzr, [x0, #16]
150150
; CHECK-NEXT: uaddlv.4s d1, v0
151-
; CHECK-NEXT: str d2, [x0, #16]
152151
; CHECK-NEXT: mov.d v0[0], v1[0]
153152
; CHECK-NEXT: ucvtf.2d v0, v0
154153
; CHECK-NEXT: fcvtn v0.2s, v0.2d

‎llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-stores.ll‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -60,9 +60,7 @@ define void @store_v2i16(ptr %a) {
6060
define void @store_v2f16(ptr %a) {
6161
; CHECK-LABEL: store_v2f16:
6262
; CHECK: // %bb.0:
63-
; CHECK-NEXT: mov z0.h, #0 // =0x0
64-
; CHECK-NEXT: fmov w8, s0
65-
; CHECK-NEXT: str w8, [x0]
63+
; CHECK-NEXT: str wzr, [x0]
6664
; CHECK-NEXT: ret
6765
store <2 x half> zeroinitializer, ptr %a
6866
ret void

‎llvm/test/CodeGen/Mips/cconv/vector.ll‎

Lines changed: 55 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -5337,35 +5337,33 @@ define void @callfloat_2() {
53375337
; MIPS32R5-NEXT: jr $ra
53385338
; MIPS32R5-NEXT: nop
53395339
;
5340-
; MIPS64R5-LABEL: callfloat_2:
5341-
; MIPS64R5: # %bb.0: # %entry
5342-
; MIPS64R5-NEXT: daddiu $sp, $sp, -16
5343-
; MIPS64R5-NEXT: .cfi_def_cfa_offset 16
5344-
; MIPS64R5-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
5345-
; MIPS64R5-NEXT: sd $gp, 0($sp) # 8-byte Folded Spill
5346-
; MIPS64R5-NEXT: .cfi_offset 31, -8
5347-
; MIPS64R5-NEXT: .cfi_offset 28, -16
5348-
; MIPS64R5-NEXT: lui $1, %hi(%neg(%gp_rel(callfloat_2)))
5349-
; MIPS64R5-NEXT: daddu $1, $1, $25
5350-
; MIPS64R5-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(callfloat_2)))
5351-
; MIPS64R5-NEXT: ld $1, %got_page(.LCPI37_0)($gp)
5352-
; MIPS64R5-NEXT: daddiu $1, $1, %got_ofst(.LCPI37_0)
5353-
; MIPS64R5-NEXT: ld.d $w0, 0($1)
5354-
; MIPS64R5-NEXT: copy_s.d $4, $w0[0]
5355-
; MIPS64R5-NEXT: ld $1, %got_page(.LCPI37_1)($gp)
5356-
; MIPS64R5-NEXT: daddiu $1, $1, %got_ofst(.LCPI37_1)
5357-
; MIPS64R5-NEXT: ld.d $w0, 0($1)
5358-
; MIPS64R5-NEXT: copy_s.d $5, $w0[0]
5359-
; MIPS64R5-NEXT: ld $25, %call16(float2_extern)($gp)
5360-
; MIPS64R5-NEXT: jalr $25
5361-
; MIPS64R5-NEXT: nop
5362-
; MIPS64R5-NEXT: ld $1, %got_disp(gv2f32)($gp)
5363-
; MIPS64R5-NEXT: sd $2, 0($1)
5364-
; MIPS64R5-NEXT: ld $gp, 0($sp) # 8-byte Folded Reload
5365-
; MIPS64R5-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload
5366-
; MIPS64R5-NEXT: daddiu $sp, $sp, 16
5367-
; MIPS64R5-NEXT: jr $ra
5368-
; MIPS64R5-NEXT: nop
5340+
; MIPS64R5EB-LABEL: callfloat_2:
5341+
; MIPS64R5EB: # %bb.0: # %entry
5342+
; MIPS64R5EB-NEXT: daddiu $sp, $sp, -16
5343+
; MIPS64R5EB-NEXT: .cfi_def_cfa_offset 16
5344+
; MIPS64R5EB-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
5345+
; MIPS64R5EB-NEXT: sd $gp, 0($sp) # 8-byte Folded Spill
5346+
; MIPS64R5EB-NEXT: .cfi_offset 31, -8
5347+
; MIPS64R5EB-NEXT: .cfi_offset 28, -16
5348+
; MIPS64R5EB-NEXT: lui $1, %hi(%neg(%gp_rel(callfloat_2)))
5349+
; MIPS64R5EB-NEXT: daddu $1, $1, $25
5350+
; MIPS64R5EB-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(callfloat_2)))
5351+
; MIPS64R5EB-NEXT: daddiu $1, $zero, 383
5352+
; MIPS64R5EB-NEXT: dsll $4, $1, 23
5353+
; MIPS64R5EB-NEXT: daddiu $1, $zero, 261
5354+
; MIPS64R5EB-NEXT: dsll $1, $1, 33
5355+
; MIPS64R5EB-NEXT: daddiu $1, $1, 523
5356+
; MIPS64R5EB-NEXT: dsll $5, $1, 21
5357+
; MIPS64R5EB-NEXT: ld $25, %call16(float2_extern)($gp)
5358+
; MIPS64R5EB-NEXT: jalr $25
5359+
; MIPS64R5EB-NEXT: nop
5360+
; MIPS64R5EB-NEXT: ld $1, %got_disp(gv2f32)($gp)
5361+
; MIPS64R5EB-NEXT: sd $2, 0($1)
5362+
; MIPS64R5EB-NEXT: ld $gp, 0($sp) # 8-byte Folded Reload
5363+
; MIPS64R5EB-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload
5364+
; MIPS64R5EB-NEXT: daddiu $sp, $sp, 16
5365+
; MIPS64R5EB-NEXT: jr $ra
5366+
; MIPS64R5EB-NEXT: nop
53695367
;
53705368
; MIPS64EL-LABEL: callfloat_2:
53715369
; MIPS64EL: # %bb.0: # %entry
@@ -5394,6 +5392,34 @@ define void @callfloat_2() {
53945392
; MIPS64EL-NEXT: daddiu $sp, $sp, 16
53955393
; MIPS64EL-NEXT: jr $ra
53965394
; MIPS64EL-NEXT: nop
5395+
;
5396+
; MIPS64R5EL-LABEL: callfloat_2:
5397+
; MIPS64R5EL: # %bb.0: # %entry
5398+
; MIPS64R5EL-NEXT: daddiu $sp, $sp, -16
5399+
; MIPS64R5EL-NEXT: .cfi_def_cfa_offset 16
5400+
; MIPS64R5EL-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
5401+
; MIPS64R5EL-NEXT: sd $gp, 0($sp) # 8-byte Folded Spill
5402+
; MIPS64R5EL-NEXT: .cfi_offset 31, -8
5403+
; MIPS64R5EL-NEXT: .cfi_offset 28, -16
5404+
; MIPS64R5EL-NEXT: lui $1, %hi(%neg(%gp_rel(callfloat_2)))
5405+
; MIPS64R5EL-NEXT: daddu $1, $1, $25
5406+
; MIPS64R5EL-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(callfloat_2)))
5407+
; MIPS64R5EL-NEXT: daddiu $1, $zero, 383
5408+
; MIPS64R5EL-NEXT: dsll $4, $1, 55
5409+
; MIPS64R5EL-NEXT: daddiu $1, $zero, 523
5410+
; MIPS64R5EL-NEXT: dsll $1, $1, 31
5411+
; MIPS64R5EL-NEXT: daddiu $1, $1, 261
5412+
; MIPS64R5EL-NEXT: dsll $5, $1, 22
5413+
; MIPS64R5EL-NEXT: ld $25, %call16(float2_extern)($gp)
5414+
; MIPS64R5EL-NEXT: jalr $25
5415+
; MIPS64R5EL-NEXT: nop
5416+
; MIPS64R5EL-NEXT: ld $1, %got_disp(gv2f32)($gp)
5417+
; MIPS64R5EL-NEXT: sd $2, 0($1)
5418+
; MIPS64R5EL-NEXT: ld $gp, 0($sp) # 8-byte Folded Reload
5419+
; MIPS64R5EL-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload
5420+
; MIPS64R5EL-NEXT: daddiu $sp, $sp, 16
5421+
; MIPS64R5EL-NEXT: jr $ra
5422+
; MIPS64R5EL-NEXT: nop
53975423
entry:
53985424
%0 = call <2 x float> @float2_extern(<2 x float> <float 0.0, float -1.0>, <2 x float> <float 12.0, float 14.0>)
53995425
store <2 x float> %0, ptr @gv2f32

‎llvm/test/CodeGen/X86/combine-concatvectors.ll‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -50,8 +50,8 @@ define void @concat_of_broadcast_v2f64_v4f64() {
5050
; AVX1-NEXT: movq %rcx, 46348(%rax)
5151
; AVX1-NEXT: vbroadcastss {{.*#+}} ymm0 = [1065353216,1065353216,1065353216,1065353216,1065353216,1065353216,1065353216,1065353216]
5252
; AVX1-NEXT: vmovups %ymm0, 48296(%rax)
53-
; AVX1-NEXT: vmovsd {{.*#+}} xmm0 = [7.812501848093234E-3,0.0E+0]
54-
; AVX1-NEXT: vmovsd %xmm0, 47372(%rax)
53+
; AVX1-NEXT: movabsq $4575657222473777152, %rcx # imm = 0x3F8000003F800000
54+
; AVX1-NEXT: movq %rcx, 47372(%rax)
5555
; AVX1-NEXT: vzeroupper
5656
; AVX1-NEXT: retq
5757
;
@@ -61,9 +61,10 @@ define void @concat_of_broadcast_v2f64_v4f64() {
6161
; AVX2-NEXT: movl $1091567616, 30256(%rax) # imm = 0x41100000
6262
; AVX2-NEXT: movabsq $4294967297, %rcx # imm = 0x100000001
6363
; AVX2-NEXT: movq %rcx, 46348(%rax)
64-
; AVX2-NEXT: vbroadcastss {{.*#+}} ymm0 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
64+
; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm0 = [4575657222473777152,4575657222473777152,4575657222473777152,4575657222473777152]
6565
; AVX2-NEXT: vmovups %ymm0, 48296(%rax)
66-
; AVX2-NEXT: vmovlps %xmm0, 47372(%rax)
66+
; AVX2-NEXT: movabsq $4575657222473777152, %rcx # imm = 0x3F8000003F800000
67+
; AVX2-NEXT: movq %rcx, 47372(%rax)
6768
; AVX2-NEXT: vzeroupper
6869
; AVX2-NEXT: retq
6970
alloca_0:

‎llvm/test/CodeGen/X86/extractelement-fp.ll‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -320,7 +320,8 @@ define <3 x double> @extvselectsetcc_crash(<2 x double> %x) {
320320
; X64-LABEL: extvselectsetcc_crash:
321321
; X64: # %bb.0:
322322
; X64-NEXT: vcmpeqpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
323-
; X64-NEXT: vmovsd {{.*#+}} xmm2 = [1.0E+0,0.0E+0]
323+
; X64-NEXT: movabsq $4607182418800017408, %rax # imm = 0x3FF0000000000000
324+
; X64-NEXT: vmovq %rax, %xmm2
324325
; X64-NEXT: vandpd %xmm2, %xmm1, %xmm1
325326
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
326327
; X64-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,2,3,3]

‎llvm/test/CodeGen/X86/ret-mmx.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,7 @@ define <2 x i32> @t3() nounwind {
4040
define double @t4() nounwind {
4141
; CHECK-LABEL: t4:
4242
; CHECK: ## %bb.0:
43-
; CHECK-NEXT: movsd {{.*#+}} xmm0 = [1,0,0,0]
43+
; CHECK-NEXT: movsd {{.*#+}} xmm0 = [4.9406564584124654E-324,0.0E+0]
4444
; CHECK-NEXT: retq
4545
ret double bitcast (<2 x i32> <i32 1, i32 0> to double)
4646
}

‎llvm/test/CodeGen/X86/vec_zero_cse.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -34,8 +34,8 @@ define void @test2() {
3434
; X86: # %bb.0:
3535
; X86-NEXT: movl $-1, M1+4
3636
; X86-NEXT: movl $-1, M1
37-
; X86-NEXT: pcmpeqd %xmm0, %xmm0
38-
; X86-NEXT: movq %xmm0, M2
37+
; X86-NEXT: movl $-1, M2+4
38+
; X86-NEXT: movl $-1, M2
3939
; X86-NEXT: retl
4040
;
4141
; X64-LABEL: test2:

‎llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll‎

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -108,11 +108,10 @@ define void @PR46178(ptr %0) {
108108
; X86-NEXT: vmovdqu (%eax), %ymm1
109109
; X86-NEXT: vpmovqw %ymm0, %xmm0
110110
; X86-NEXT: vpmovqw %ymm1, %xmm1
111-
; X86-NEXT: vpsllw $8, %xmm0, %xmm0
112-
; X86-NEXT: vpsraw $8, %xmm0, %xmm0
113-
; X86-NEXT: vpsllw $8, %xmm1, %xmm1
114-
; X86-NEXT: vpsraw $8, %xmm1, %xmm1
115-
; X86-NEXT: vpunpcklqdq {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[2],ymm1[2]
111+
; X86-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
112+
; X86-NEXT: vpsllw $8, %ymm0, %ymm0
113+
; X86-NEXT: vpsraw $8, %ymm0, %ymm0
114+
; X86-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,1]
116115
; X86-NEXT: vmovdqu %ymm0, (%eax)
117116
; X86-NEXT: vzeroupper
118117
; X86-NEXT: retl

‎llvm/test/CodeGen/X86/widen_shuffle-1.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -105,8 +105,8 @@ define void @shuf5(ptr %p) nounwind {
105105
; X86-LABEL: shuf5:
106106
; X86: # %bb.0:
107107
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
108-
; X86-NEXT: movsd {{.*#+}} xmm0 = [33,33,33,33,33,33,33,33,0,0,0,0,0,0,0,0]
109-
; X86-NEXT: movsd %xmm0, (%eax)
108+
; X86-NEXT: movl $555819297, 4(%eax) # imm = 0x21212121
109+
; X86-NEXT: movl $555819297, (%eax) # imm = 0x21212121
110110
; X86-NEXT: retl
111111
;
112112
; X64-LABEL: shuf5:

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